555 timer IC

The timer IC was designed in 1971 by Hans Camenzind under contract to Signetics. Camenzind proposed the development of a universal circuit based on the oscillator for PLLs and asked that he develop it alone, borrowing equipment from Signetics instead of having his pay cut in half. Camenzind's idea was originally rejected, since other engineers argued the product could be built from existing parts sold by the company; however, the marketing manager approved the idea. The first design for the 555 was reviewed in the summer of 1971. The 9-pin version had already been released by another company founded by an engineer who had attended the first review and had retired from Signetics; that firm withdrew its version soon after the 555 was released. The 555 timer was manufactured by 12 companies in 1972, and it became a best-selling product. However, in a recorded interview with an online transistor museum curator, Hans Camenzind said "It was just arbitrarily chosen. It was Art Fury (marketing manager) who thought the circuit was gonna sell big who picked the name '555' timer IC." ==Design==

Depending on the manufacturer, the standard 555 package incorporated the equivalent of 25 transistors, 2 diodes, and 15 resistors on a silicon chip packaged into an 8-pin dual in-line package (DIP-8). Variants available included the 556 (a DIP-14 combining two complete 555s on one chip), and 558 / 559 (both variants were a DIP-16 combining four reduced-functionality timers on one chip). The NE555 parts were commercial temperature range, 0 °C to +70 °C, and the SE555 part number designated the military temperature range, −55 °C to +125 °C. These chips were available in both high-reliability metal can (T package) and inexpensive epoxy plastic (V package) form factors. Thus, the full part numbers were NE555V, NE555T, SE555V, and SE555T. Low-power CMOS versions of the 555 are now available, such as the Intersil ICM7555 and Texas Instruments LMC555, TLC555, TLC551. Internal schematic The internal block diagram and schematic of the 555 timer are highlighted with the same color across all three drawings to clarify how the chip is implemented: • : Between the positive supply voltage VCC and the ground GND is a voltage divider consisting of three identical resistors (5kΩ for bipolar timers, 100kΩ or higher for CMOS) to create reference voltages for the analog comparators. CONTROL is connected between the upper two resistors, allowing an external voltage to control the reference voltages: • When CONTROL is not driven, this divider creates an upper reference voltage of VCC and a lower reference voltage of VCC. • When CONTROL is driven, the upper reference voltage will instead be VCONTROL and the lower reference voltage will be VCONTROL. • : The comparator's negative input is connected to voltage divider's upper reference voltage, and the comparator's positive input is connected to THRESHOLD. • : The comparator's positive input is connected to voltage divider's lower reference, and the comparator's negative input is connected to TRIGGER. • : A set-reset latch stores the state of the timer and is controlled by the two comparators. RESET overrides the other two inputs, thus the latch (and therefore the entire timer) can be reset at any time. • : The output of the latch is followed by an output stage with pushpull output drivers that can supply up to 200mA for bipolar timers, lower for CMOS timers. • : Also, the output of the latch controls a transistor acting as an electronic switch that connects DISCHARGE to ground. File:NE555 Bloc Diagram.svg|555 internal block diagram File:NE555 Internal Circuit.svg|555 internal schematic of bipolar version File:C555 Internal Circuit.svg|555 internal schematic of CMOS version Pinout The pinout of the 8-pin 555 timer and 14-pin 556 dual timer are shown in the following table. Since the 556 is conceptually two 555 timers that share power pins, the pin numbers for each half are split across two columns. File:555 Pinout.svg| Pinout of 555 single timer File:NE556 pennen.svg| Pinout of 556 dual timer == Modes ==

The 555 IC has the following operating modes: • Astable (free-running) mode – The 555 operates as an electronic oscillator. Applications include: • As a general-purpose oscillator or clock/periodic timer, which may be used for many things including: Light emitting diode and lamp flashers, pulse generation, pulse-width modulation (PWM), logic clocks, tone generation, security alarms, pulse-position modulation, etc. • Analog-to-digital conversion (ADC) from an analog value represented by a resistance or capacitance into a digital pulse length. • e.g., selecting a thermistor as timing resistor allows the use of the 555 in a temperature sensor with the period of the output pulse determined by the temperature. A microprocessor can then convert the pulse period to temperature, linearize it, and even provide calibration. • Monostable (one-shot) mode – The 555 operates as a "one-shot" pulse generator. Applications include: • timers, missing pulse detection, bounce-free switches, touch switches, frequency dividers, triggered measurement of resistance or capacitance, PWM, etc. • Bistable (latch) mode – The 555 operates as a set-reset latch. Applications include: • switch debouncing. • Schmitt trigger (inverter) mode – the 555 operates as a Schmitt trigger inverter gate. Application: • Converts a noisy input into a clean digital output. Astable In the astable configuration, the 555 timer puts out a continuous stream of rectangular pulses having a specific period. The astable configuration is implemented using two resistors, R_1 and R_2 , and one capacitor C. The threshold and trigger pins are both connected to the capacitor; thus they have the same voltage. Its repeated operating cycle (starting with the capacitor uncharged) is: • Since the capacitor's voltage will be below  VCC, the trigger pin causes the 555's internal latch to change state, causing OUT to go high and the internal discharge transistor to cut-off. • Since the discharge pin is no longer short-circuited to ground, the capacitor starts charging via current from Vcc through the resistors R_1 and R_2. • Once the capacitor charge reaches  Vcc, the threshold pin causes the 555's internal latch to change state, causing OUT to go low and the internal discharge transistor to go into saturation (maximal-conductivity) mode. • This discharge transistor provides a discharge path, so the capacitor starts discharging through R_2. • Once the capacitor's voltage drops below  VCC, the cycle repeats from step 1. During the first pulse, the capacitor charges from 0 V to  VCC, however, in later pulses, it only charges from  VCC to  VCC. Consequently, the first pulse has a longer high time interval compared to later pulses. Moreover, the capacitor charges through both resistors but only discharges through R_2, thus the output high interval is longer than the low interval. This is shown in the following equations: The output high time interval of each pulse is given by: and even after such chips, e.g. 1987 LT1070, were economically available in the late 1980s, an early 555 use was switching-mode voltage regulator. Timing components would be selected for duty cycle range, adequate for the current load limits. Control voltage would be the output of fixed gain amplified voltage error. File:555_switching_mode_voltage_regulator_minload.png|Switching Mode Voltage Regulator (minimum load). With control voltage, 0.75V, duty cycle is 30%. During thigh, 13us, inductor charges 0.65A through saturated transistor. During 5.6us, inductor discharges through diode to top off capacitor. During 24us remaining in tlow, 32us, inductor is steady discharged. File:555_switching_mode_voltage_4egulator_maxload.png|Switching Mode Voltage Regulator (maximum load). With control voltage, 2.6V, duty cycle is 70%. During thigh, 68us, inductor charges 3.27mA through saturated transistor. During 32us, inductor discharges through diode to top off capacitor. No time remains in tlow, 32us, so no further load increase is supported. File:555_switching_mode_voltage_regulator_schematic.png|Switching Mode Voltage Regulator Schematic. When Vout rises, it increases feedback transistor voltage through the resister ladder. This decreases control voltage and duty cycle to lower Vout. Vout is held with 5%, though load varies by factor of 10. The feedback capacitor introduces phase-shift to prevent feedback oscillation. Capacitor limits ripple to 1.3%. As supply voltage changes from 5V to 12V, the same duty cycle feedback loop reduces Vout change to 2V. Monostable Monostable mode produces an output pulse when the trigger signals drops below VCC. An RC circuit sets the output pulse's duration as the time t in seconds it takes to charge C to VCC: The trigger and reset inputs may be held high via pull-up resistors if they are normally Hi-Z and only enabled by connecting to ground. Bistable Schmitt trigger inverter gate A 555 timer can be used to create a Schmitt trigger inverter gate with two outputs: output pin is a push-pull output, discharge pin is an open-collector output (requires a pull-up resistor). For the schematic on the right, an input signal is AC-coupled through a low value series capacitor, then biased by identical high-resistance resistors R_1 and R_2, which causes the signal to be centered at Vcc. This centered signal is connected to both the trigger and threshold input pins of the timer. The input signal must be strong enough to excite the trigger levels of the comparators to exceed the lower VCC and upper VCC thresholds in order to cause them to change state, thus providing the Schmitt trigger feature. No timing capacitors are required in a bistable configuration. ==Packages==

-8 and SO-8 packages In 1972, Signetics originally released the 555 timer in DIP-8 and TO5-8 metal can packages, and the 556 timer was released in a DIP-14 package. In 2006, the dual 556 timer was available in through-hole packages as DIP-14 (2.54 mm pitch), and surface-mount packages as SO-14 (1.27 mm pitch) and SSOP-14 (0.65 mm pitch). In 2012, the 555 was available in through-hole packages as DIP-8 (2.54 mm pitch), and surface-mount packages as SO-8 (1.27 mm pitch), SSOP-8 / TSSOP-8 / VSSOP-8 (0.65 mm pitch), BGA (0.5 mm pitch). The MIC1555 is a CMOS 555-type timer with three fewer pins available in SOT23-5 (0.95 mm pitch) surface-mount package. == Specifications ==

These specifications apply to the original bipolar NE555. Other 555 timers can have different specifications depending on the grade (industrial, military, medical, etc.). ==Derivatives==

Numerous companies have manufactured one or more variants of the 555, 556, 558 timers over the past decades, under many different part numbers. The following is a partial list: ; Table notes • All information in the above table was pulled from references in the datasheet column, except where denoted below. • For the "Total timers" column, a "*" denotes parts that are missing 555 timer features. • For the "Iq" column, a 5-volt supply was chosen as a common voltage to make it easier to compare. The value for Signetics NE558 is an estimate because NE558 datasheets don't state Iq at 5 V. • For the "Manufacturer" column, the following associates historical 555 timer manufacturers to current company names. • Fairchild Semiconductor was sold to ON Semiconductor in 2016. ON Semiconductor was founded in 1999 as a spinoff of Motorola Semiconductor Components Group. The MC1455 started as a Motorola product. • Intersil was sold to Renesas Electronics in 2017. The ICM7555 and ICM7556 started as Intersil products. • Micrel was sold to Microchip Technology in 2015. The MIC1555 started as a Micrel product. • National Semiconductor was sold to Texas Instruments in 2011. The LM555 and LM556 started as a National Semiconductor products. • Signetics was sold to Philips Semiconductor in 1975, later to NXP Semiconductors in 2006. • Zetex Semiconductors was sold to Diodes Incorporated in 2008. The ZSCT1555 started as a Zetex product. 556 dual timer The dual version is called 556. It features two complete 555 timers in a 14-pin package; only the two power-supply pins are shared between the two timers. Partial list of differences between 558 and 555 chips: • One VCC and one GND, similar to 556 chip. • Four "Reset" are tied together internally to one external pin (558). • Four "Control Voltage" are tied together internally to one external pin (558). • Four "Triggers" are falling-edge sensitive (558), instead of level sensitive (555). • Two resistors in the voltage divider (558), instead of three resistors (555). • One comparator (558), instead of two comparators (555). • Four "Output" are open-collector (O.C.) type (558), instead of push–pull (P.P.) type (555). == See also ==