(at end of cable under plastic museum cover), cigarette lighter, and ash tray (left of the light gun). MIT selected IBM as the prime contractor for equipment construction. The
Central Computer System of the AN/FSQ-7 had two computers for redundancy each with Arithmetic, Core Memory, Instruction Control, Maintenance Control, Selection & IO Control, and Program elements. •
Display and Warning Light System with dozens of consoles in various rooms having Situation Display Tubes, Digital Display Tubes, and controls (e.g., push buttons and light gun) including: •
Duplex Maintenance Console (two), each DMC operated one of the Central Computer Systems and allowed diagnostics (a speaker was available) •
Command Post Digital Display Desk Operator displays were directly copied on
35 mm film which were projected on the board. Punched card data was transferred to and from the core memory as
binary images. Only the rightmost 64 columns were transferred, with each row containing two 32-bit words. (The left columns could be punched using a special instruction.) Data were transferred to the line printer as a card image as well.
Core memory element The FSQ-7 and -8 used core memory with 32-bit words plus a parity bit, operating at a 6-microsecond cycle time. Both machines had two banks of memory, memory 1 and memory 2 (Commonly referred to as Big Mem and little Mem). On the FSQ 7 memory 1 had 65,536 words and memory 2 had 4096 words. At
Luke Air Force Base, the FSQ-7 held 65,536 words at each bank and the FSQ-8 4096 words at each bank. For data storage, each word was divided into two halves, each half was a 15-bit number with a
sign bit. Arithmetic operations were performed on both halves simultaneously. Each number was treated as a fraction between −1 and 1. This restriction is placed on data primarily so that the multiplication of two numbers will always result in a product smaller than either of the numbers, thus positively avoiding overflow. Properly scaling calculations was the responsibility of the programmer. Instructions used the right half word plus the left sign bit to form addresses, yielding a 17-bit address space. The remainder of the left half word specified the operation. The first three bits after the sign specified an
index register. The following bits specified an instruction class, class variation and instruction-dependent auxiliary information. Addresses were written in
octal notation, with the two sign bits forming a prefix, so 2.07777 would be the highest word in memory 2. Arithmetic registers were provided for both halves of the data word and included an accumulator, an A register that held the data value retrieved from memory, and a B register that held the least significant bits of a multiplication, the magnitude of a division, as well as shifted bits. There was also a program counter, four index registers, and a 16-bit real-time clock register which was incremented 32 times a second. Trigonometric sine and cosine functions used 1.4 degree precision (256 values) via look-up tables. ==See also==