It used the same 30-
bit words and
instruction set as the
AN/USQ-17 and
AN/USQ-20 Naval Tactical Data System (NTDS) computers, built with "
first generation integrated circuits". This made it about one quarter of the volume of the AN/USQ-20. It had two
processors instead of just one. Instructions were represented as 30-bit words, in the following format: f 6 bits function code j 3 bits jump condition designator k 3 bits partial word designator b 3 bits which seven index register to use (B0=non used) s 2 bits which S (5bits) register to use S0,S1,S2,S3(P(17-13)) y 13 bits
operand address in memory memory address = Bb + Ss + y = 18 bit (262,144 words) Numbers were represented as full 30-bit words. This also allowed for five 6-bit
alphanumeric characters per word. The
main memory was increased to 262,144 words (256
K words) of
magnetic-core memory. The available
processor registers were: • one 30-bit
arithmetic (A) register. • a contiguous 30-bit Q register (total of 60 bits for the result of multiplication or the dividend in division). • seven 30-bit
index (B) registers. ==See also==