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ARM Cortex-R

The ARM Cortex-R is a family of 32-bit and 64-bit RISC ARM processor cores licensed by ARM Ltd. The cores are optimized for hard real-time and safety-critical applications. Cores in this family implement the ARM Real-time (R) profile, which is one of three architecture profiles, the other two being the Application (A) profile implemented by the Cortex-A family and the Microcontroller (M) profile implemented by the Cortex-M family. The ARM Cortex-R family of microprocessors currently consists of the Cortex-R4(F), Cortex-R5(F), Cortex-R7(F), Cortex-R8(F), Cortex-R52(F), Cortex-R52+(F), and the Cortex-R82(F).

Overview
The ARM Cortex-R is a family of ARM cores implementing the R profile of the ARM architecture; that profile is designed for high performance hard real-time and safety critical applications. It is similar to the A profile for applications processing but adds features which make it more fault tolerant and suitable for use in hard real-time and safety critical applications. Real time and safety critical features added include: • Tightly coupled memory (uncached memory with guaranteed fast access time) • Increased exception handling in hardware • Hardware division instructions • Memory protection unit (MPU) • Deterministic interrupt handling as well as fast non-maskable interrupts • ECC on L1 cache and buses • Dual-core lockstep for CPU fault tolerance The Armv8-R architecture includes virtualization features similar to those introduced in the Armv7-A architecture. Two stages of MPU-based translation are provided to enable multiple operating systems to be isolated from one another under the control of a hypervisor. Prior to the R82, introduced on 4 September 2020, the Cortex-R family did not have a memory management unit (MMU). Models prior to the R82 could not use virtual memory, which made them unsuitable for many applications, such as full-featured Linux. However, many real-time operating systems (RTOS), with an emphasis on total control, have traditionally regarded the lack of an MMU as a feature, not a bug. On the R82, it may be possible to run a traditional RTOS in parallel with a paged OS such as Linux, where Linux takes advantage of the MMU for flexibility, while the RTOS locks the MMU into a direct translation mode on pages assigned to the RTOS so as to retain full predictability for real-time functions. ARM license Arm Holdings neither manufactures nor sells CPU devices based on its own designs, but rather licenses the core designs to interested parties. ARM offers a variety of licensing terms, varying in cost and deliverables. To all licensees, ARM provides an integratable hardware description of the ARM core, as well as complete software development toolset and the right to sell manufactured silicon containing the ARM CPU. Silicon customization Integrated device manufacturers (IDM) receive the ARM Processor IP as synthesizable RTL (written in Verilog). In this form, they have the ability to perform architectural level optimizations and extensions. This allows the manufacturer to achieve custom design goals, such as higher clock speed, very low power consumption, instruction set extensions, optimizations for size, debug support, etc. To determine which components have been included in a particular ARM CPU chip, consult the manufacturer datasheet and related documentation. ==Applications==
Applications
The Cortex-R is suitable for use in computer-controlled systems where very low latency and/or a high level of safety is required. An example of a hard real-time, safety critical application would be a modern electronic braking system in an automobile. The system not only needs to be fast and responsive to a plethora of sensor data input, but is also responsible for human safety. A failure of such a system could lead to severe injury or loss of life. Other examples of hard real-time and/or safety critical applications include: • Medical device • Programmable logic controller (PLC) • Electronic control units (ECU) for a wide variety of applications • Robotics • Avionics • Motion control • Advanced peripheral devices, such as flash memory controller and network interface controller == Certifications ==
Certifications
ARM Cortex-R52+ processor IP core achieved certification on 22 April 2024 of compliance with the requirements of: • Automotive Safety Integrity Level D, the most onerous safety level defined by ISO 26262 for software used within road vehicles. • Safety Integrity Level 3 defined by IEC 61508. ARM Cortex-R5 and Cortex-R5F processor IP cores achieved certification on 22 March 2024 of compliance with the requirements of: • Automotive Safety Integrity Level D defined by ISO 26262. • Safety Integrity Level 3 defined by IEC 61508. ==See also==
Source: Wikipedia ↗
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