The J90 was available in three basic configurations, the
J98 with up to eight processors, the
J916 with up to 16 processors, and the
J932 with up to 32 processors. Each J90 processor was composed of two chips - one for the scalar portion of the processor, and the other for the vector portion. The scalar chip was also notable for including a small (128 word)
data cache to enhance scalar performance. (Cray machines have always had instruction caching.) In 1997 the
J90se (
Scalar Enhanced) series became available, which doubled the scalar speed of the processors to 200 MHz; the vector chip remained at 100 MHz. Support was also added for the GigaRing I/O system found on the
Cray T3E and
Cray SV1, replacing IOS-V. Later,
SV1 processors could be installed in a J90 or J90se, further increasing performance within the same frame. == References ==