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Dadda multiplier

The Dadda multiplier is a hardware binary multiplier design invented by computer scientist Luigi Dadda in 1965. It uses a selection of full and half adders to sum the partial products in stages until two numbers are left. The design is similar to the Wallace multiplier, but the different reduction tree reduces the required number of gates and makes it slightly faster.

Description
To achieve a more optimal final product, the structure of the reduction process is governed by slightly more complex rules than in Wallace multipliers. The progression of the reduction is controlled by a maximum-height sequence d_j, defined by: : d_1 = 2, and d_{j+1} = \operatorname{floor}(1.5 d_j). This yields a sequence like so: : d_1=2, d_2=3, d_3=4, d_4=6, d_5=9, d_6=13, \ldots The initial value of j is chosen as the largest value such that d_j , where n_1 and n_2 are the number of bits in the input multiplicand and multiplier. The lesser of the two bit lengths will be the maximum height of each column of weights after the first stage of multiplication. For each stage j of the reduction, the goal of the algorithm is the reduce the height of each column so that it is less than or equal to the value of d_j. For each stage from ,\ldots,1, reduce each column starting at the lowest-weight column, c_0 according to these rules: • If \operatorname{height}(c_i) \leqslant d_j the column does not require reduction, move to column c_{i+1} • If \operatorname{height}(c_i) = d_j + 1 add the top two elements in a half-adder, placing the result at the bottom of the column and the carry at the bottom of column c_{i+1}, then move to column c_{i+1} • Else, add the top three elements in a full-adder, placing the result at the bottom of the column and the carry at the bottom of column c_{i+1}, restart c_iat step 1 == Algorithm example ==
Algorithm example
s (two dots) and 35 full adders (three dots). The dots in each column are bits of equal weight. Bits with lower weight are rightmost. The example in the adjacent image illustrates the reduction of an 8 × 8 multiplier, explained here. The initial state j = 4 is chosen as d_4 = 6, the largest value less than 8. Stage j=4, d_4 = 6 • \operatorname{height}(c_0\cdots c_5) are all less than or equal to six bits in height, so no changes are made • \operatorname{height}(c_6) = d_4 + 1 = 7, so a half-adder is applied, reducing it to six bits and adding its carry bit to c_7 • \operatorname{height}(c_7) = 9 including the carry bit from c_6, so we apply a full-adder and a half-adder to reduce it to six bits • \operatorname{height}(c_8) = 9 including two carry bits from c_7, so we again apply a full-adder and a half-adder to reduce it to six bits • \operatorname{height}(c_9) = 8 including two carry bits from c_8, so we apply a single full-adder and reduce it to six bits • \operatorname{height}(c_{10}\cdots c_{14}) are all less than or equal to six bits in height including carry bits, so no changes are made Stage j=3, d_3 = 4 • \operatorname{height}(c_0\cdots c_3) are all less than or equal to four bits in height, so no changes are made • \operatorname{height}(c_4) = d_3 + 1 = 5, so a half-adder is applied, reducing it to four bits and adding its carry bit to c_5 • \operatorname{height}(c_5) = 7 including the carry bit from c_4, so we apply a full-adder and a half-adder to reduce it to four bits • \operatorname{height}(c_6\cdots c_{10}) = 8 including previous carry bits, so we apply two full-adders to reduce them to four bits • \operatorname{height}(c_{11}) = 6 including previous carry bits, so we apply a full-adder to reduce it to four bits • \operatorname{height}(c_{12}\cdots c_{14}) are all less than or equal to four bits in height including carry bits, so no changes are made Stage j=2, d_2 = 3 • \operatorname{height}(c_0\cdots c_2) are all less than or equal to three bits in height, so no changes are made • \operatorname{height}(c_3) = d_2 + 1 = 4, so a half-adder is applied, reducing it to three bits and adding its carry bit to c_4 • \operatorname{height}(c_4\cdots c_{12}) = 5 including previous carry bits, so we apply one full-adder to reduce them to three bits • \operatorname{height}(c_{13}\cdots c_{14}) are all less than or equal to three bits in height including carry bits, so no changes are made Stage j=1, d_1 = 2 • \operatorname{height}(c_0\cdots c_1) are all less than or equal to two bits in height, so no changes are made • \operatorname{height}(c_2) = d_1 + 1 = 3, so a half-adder is applied, reducing it to two bits and adding its carry bit to c_3 • \operatorname{height}(c_3\cdots c_{13}) = 4 including previous carry bits, so we apply one full-adder to reduce them to two bits • \operatorname{height}(c_{14}) = 2 including the carry bit from c_{13}, so no changes are made Addition The output of the last stage leaves 15 columns of height two or less which can be passed into a standard adder. ==See also==
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