Prior to the DDC, the
VGA standard had reserved four pins in the analog
VGA connector, known as ID0, ID1, ID2 and ID3 (pins 11, 12, 4 and 15) for identification of monitor type. These ID pins, attached to resistors to pull one or more of them to ground (GND), allowed for the definition of the monitor type, with all open (n/c, not connected) meaning "no monitor". In the most commonly documented scheme, the ID3 pin was unused and only the 3 remaining pins were defined. The ID0 was pulled to GND by color monitors, while the monochrome monitors pulled ID1 to GND. Finally, the ID2 pulled to GND signaled a monitor capable of 1024×768 resolution, such as
IBM 8514. In this scheme, the input states of the ID pins would encode the monitor type as follows: More elaborate schemes also existed that used all of the 4 ID pins while manipulating the HSync and VSync signals in order to extract 16 bits (4 ID pin values for each of the 4 combinations of HSync and VSync states) of monitor identification. DDC changed the purpose of the ID pins to incorporate a
serial link interface. However, during the transition, the change was not backwards-compatible and video cards using the old scheme could have problems if a DDC-capable monitor was connected. The DDC signal can be sent to or from a video graphics array (VGA) monitor with the I2C protocol using the master's serial clock and serial data pins.
DDC1 DDC1 is a simple, low-speed, unidirectional
serial link protocol. Pin 12, ID1 functions as a data line that continuously transmits the 128-byte EDID block, and the data clock is synchronised with
vertical sync, providing typical clock rates of 60 to 100 Hz. Very few display devices implemented this protocol.
DDC2 The most common version, called
DDC2B, is based on
I²C, a
serial bus. Pin 12, ID1, of the VGA connector is used as the data pin of the I²C bus, and the formerly-unused pin 15 is the I²C clock. Pin 9, previously used as a mechanical key, supplies +5V DC power (up to 50mA) to power the EEPROM. With this, the host can read the EDID even if the monitor is powered off. Though I²C is fully
bidirectional and supports multiple
bus-masters, DDC2B is unidirectional and allows only one
bus master—the graphics adapter. The monitor acts as a slave device at the 7-bit I²C address 50h, and provides 128-256 bytes of read-only EDID. Because this access is always a read, the first I²C octet will always be A1h.
DDC2Ab is an implementation of the I²C-based 100-kbit/s
ACCESS.bus interface, which made it possible for monitor manufacturers to support external ACCESS.bus peripherals such as a mouse or keyboard with little to no additional effort. Such devices and monitors were briefly available in the mid-1990s, but they disappeared with the introduction of
USB.
DDC2B+ and
DDC2Bi are scaled-down versions of DDC2Ab which only support monitor and graphics card devices but still allow bidirectional communication between them. DDC2 is not exclusive to the VGA interface. Both
DVI and
HDMI feature dedicated DDC2B wires. ==DDC/CI==