Edward S. Davidson

His research interests include computer architecture, pipelining theory, parallel processing, performance modeling, intelligent caches, and application tuning. In the 1970s, he developed the reservation table approach to optimum design and cyclic scheduling of pipelines, designed and implemented an eight-node symmetric multiprocessor (SMP) system in 1976, and developed a variety of systematic methods for modeling performance and enhancing systems, including early work on simulated annealing, wave pipelining, multiple instruction stream pipelines, decoupled access-execute architecture, and polycyclic scheduling (aka software pipelining). He is a Fellow of the IEEE. ==Education==

• 1961 Harvard University, B.A. in Mathematics • 1962 University of Michigan, M.S. in Communication Science • 1968 University of Illinois, Ph.D. in Electrical Engineering ==Teaching==

• 1968–1973 Stanford University, Assistant Professor of Electrical Engineering • 1973–1987 University of Illinois at Urbana-Champaign, Professor of Electrical and Computer Engineering • 1988–present University of Michigan, Professor of Computer Science and Engineering ==Service==

• 1984-1987 Hardware Design Director, Cedar Parallel Supercomputer at the University of Illinois Center for Supercomputing Research and Development • 1988-1990 Chair of the Department of Electrical Engineering and Computer Science, University of Michigan • 1994-1997 Director, Center for Parallel Computing, University of Michigan • 1997-2000 Associate chair for Computer Science and Engineering, University of Michigan ==Awards==

• 1992 IEEE Harry H. Goode Memorial Award for "pivotal seminal contributions to the design, implementation, and performance evaluation of high performance computer systems." • 1996 Taylor L. Booth Education Award for "contributions to the establishment of computer engineering as an academic discipline and for nurturing many leaders of this field during their formative years in the profession." • 2000 IEEE/ACM Eckert-Mauchly Award "for his seminal contributions to the design, implementation, and performance evaluation of high performance pipelines and multiprocessor systems" ==References==