of a
NOT gate has an overall gate delay of 3
logic gates from the inputs
A and
B to the carry output
Cout shown in red.
Logic gates can have a
gate delay ranging from
picoseconds to more than 10 nanoseconds, depending on the technology being used. • Increases in output load capacitance, often from placing increased fan-out loads on a wire, will also increase propagation delay. All of these factors influence each other through an
RC time constant: any increase in load capacitance increases C, heat-induced resistance the R factor, and supply threshold voltage increases will affect whether more than one time constants are required to reach the threshold. If the output of a logic gate is connected to a long trace or used to drive many other gates (high
fanout) the propagation delay increases substantially. == Networking ==