Originally introduced by
embedded systems such as the
Cell Broadband Engine, sharing system memory directly between multiple system actors makes heterogeneous computing more mainstream. Heterogeneous computing itself refers to systems that contain multiple processing units
central processing units (CPUs),
graphics processing units (GPUs),
digital signal processors (DSPs), or any type of
application-specific integrated circuits (ASICs). The system architecture allows any accelerator, for instance a
graphics processor, to operate at the same processing level as the system's CPU. Among its main features, HSA defines a unified
virtual address space for compute devices: where GPUs traditionally have their own memory, separate from the main (CPU) memory, HSA requires these devices to share
page tables so that devices can exchange data by sharing
pointers. This is to be supported by custom
memory management units. To render interoperability possible and also to ease various aspects of programming, HSA is intended to be
ISA-agnostic for both CPUs and accelerators, and to support high-level programming languages. So far, the HSA specifications cover:
HSA Intermediate Layer HSAIL (Heterogeneous System Architecture Intermediate Language), a
virtual instruction set for parallel programs • similar to
LLVM Intermediate Representation and
SPIR (used by
OpenCL and
Vulkan) • finalized to a specific instruction set by a
JIT compiler • make late decisions on which core(s) should run a task • explicitly parallel • supports exceptions, virtual functions and other high-level features • debugging support
HSA memory model • compatible with
C++11, OpenCL,
Java and
.NET memory models • relaxed consistency • designed to support both managed languages (e.g. Java) and unmanaged languages (e.g.
C) • will make it much easier to develop 3rd-party compilers for a wide range of heterogeneous products programmed in
Fortran, C++,
C++ AMP, Java, et al.
HSA dispatcher and run-time • designed to enable heterogeneous task queueing: a work queue per core, distribution of work into queues, load balancing by work stealing • any core can schedule work for any other, including itself • significant reduction of overhead of scheduling work for a core Mobile devices are one of the HSA's application areas, in which it yields improved power efficiency.
Block diagrams The illustrations below compare CPU-GPU coordination under HSA versus under traditional architectures. ==Software support==