The System/32 featured a
16-bit processor with a 200ns cycle time known as the
Control Storage Processor (CSP). Whereas the System/3 used a hardwired processor, the System/32 implemented the System/3 instruction set in
microcode. The System/32 processor utilized a vertical microcode format, with each microinstruction occupying 16 bits of control storage. There were 19 different microinstruction opcodes, however certain microinstructions could carry out different operations depending on which bits were set in the rest of the microinstruction, meaning that there were about 70 distinct operations available in total. An optional set of
Scientific Macroinstructions was also available, which were used to support a
Fortran compiler by implementing support for
floating point arithmetic in microcode. Some IBM engineers, including
Glenn Henry and
Frank Soltis, have retrospectively described the System/32's microcode as resembling a
RISC instruction set. The later System/34 and System/36 systems addressed this problem by using two different processors - the System/32 CSP architecture was used exclusively for operating system, I/O control and floating point code, whereas user code ran on the
Main Storage Processor (MSP) which implemented the System/3 instruction set directly in hardware without microcode. The use of microcode to implement instruction set emulation as well as performance-critical operating system components had some influence on the design of the microcode layers in the later
System/38. ==Memory/storage==