In
integrated circuits, and
CMOS devices, silicon dioxide can readily be formed on surfaces of Si through
thermal oxidation, and can further be deposited on the surfaces of conductors using
chemical vapor deposition or various other thin film fabrication methods. Due to the wide range of methods that can be used to cheaply form silicon dioxide layers, this material is used conventionally as the baseline to which other low permittivity dielectrics are compared. The relative dielectric constant of SiO2, the insulating material still used in
silicon chips, is 3.9. This number is the ratio of the
permittivity of SiO2 divided by permittivity of vacuum, εSiO2/ε0, where ε0 = 8.854×10−6 pF/μm. There are many materials with lower relative dielectric constants but few of them can be suitably integrated into a manufacturing process. Development efforts have focused primarily on the following classes of materials:
Fluorine-doped silicon dioxide By doping SiO2 with fluorine to produce fluorinated silica glass, the relative dielectric constant is lowered from 3.9 to 3.5. Fluorine-doped oxide materials were used for the
180 nm and
130 nm technology nodes.
Organosilicate glass or OSG (Carbon-doped oxide or CDO) By doping SiO2 with carbon, one can lower the relative dielectric constant to 3.0, the density to 1.4 g/cm3 and the thermal conductivity to 0.39 W/(m*K). The
semiconductor industry has been using the organosilicate glass dielectrics since the
90 nm technology node. where the first step consists of the co-deposition of a labile organic phase (known as porogen) together with an organosilicate phase resulting in an organic-inorganic
hybrid material. In the second step, the organic phase is decomposed by
UV curing or
annealing at a temperature of up to 400 °C, leaving behind pores in the organosilicate low-κ materials. Porous organosilicate glasses have been employed since the
45 nm technology node.
Spin-on organic polymeric dielectrics Polymeric dielectrics are generally deposited by a spin-on approach, which is traditionally used for the deposition of
photoresist materials, rather than
chemical vapor deposition. Integration difficulties include low mechanical strength,
coefficient of thermal expansion (CTE) mismatch and thermal stability. Some examples of spin-on organic low-κ polymers are
polyimide,
polynorbornenes,
benzocyclobutene, and
PTFE.
Spin-on silicon based polymeric dielectric There are two kinds of silicon based polymeric dielectric materials,
hydrogen silsesquioxane and methylsilsesquioxane.
Air gaps The ultimate low-κ material is air with a relative permittivity value of ~1.0. However, the placement of air gaps between the conducting wires compromises the mechanical stability of the integrated circuit making it impractical to build an IC consisting entirely of air as the insulating material. Nevertheless, the strategic placement of air gaps can improve the chip's electrical performance without compromising critically its durability. For example, Intel uses air gaps for two interconnect levels in its
14 nm FinFET technology. ==See also==