68000 and 68010 At the time the
Motorola 68000 was designed, Motorola's design and fabrication services were outdated. Although even small companies like
MOS Technology and
Zilog had moved on to silicon gate
depletion mode NMOS logic on ever-larger
wafers, Motorola was still using metal gates and enhancement mode and their largest fab worked on 4-inch wafers long after most lines had moved to 5-inch. Although the 68000 met the goal of being the fastest CPU available when it was introduced, it was not nearly as powerful as it could be if it had been designed with more modern techniques. During the period of the 68000 design, the company was working with
Hitachi on their process technology and as part of this they opened a new fab, MOS-8, using 5-inch wafers and the latest
HMOS process licensed from
Intel. This line was capable of building all of the new techniques, but the 68000 went ahead with the older design as they were sure it would work. Moving to new design techniques would wait until the design was in the market. The conversion to the new design techniques took place during the
Motorola 68010 effort, a relatively minor upgrade to the original design that added basic
virtual memory support for the emerging
Unix workstation market.
020 concept emerges As this effort was ongoing, Motorola was canvassing their customers for their desires for future developments in the line. These all pointed to a fully 32-bit implementation. Those using the 68k in Unix systems also stated they would purchase a
floating-point unit for every one of the machines if one was available. The original 68000 had been designed as a hybrid 16/32-bit system largely because the maximum number of pins available on
dual inline packages (DIPs) was 64, and even at that size, packaging of this size was highly problematic. By reducing the number of
address pins to 24, and the
data pins to only 16, there were enough free pins to implement all the other needed lines, like interrupts and power supplies. The 24-pin address bus meant that the memory could only be 16 MB in total, which was at this point becoming a limitation. The 16-bit data bus meant reading a 32-bit word from that memory required two bus cycles. A design that had 32 pins for both the address and data busses would access data twice as fast, making the machine that much faster even with no other changes. Moving to 32-bit addressing would also make the implementation of virtual memory easier, and allow for more than 16 MB of
random access memory. But doing so would also demand a much higher total pin count. By the early 1980s, similar limitations on all modern CPU designs led to the introduction of the
pin grid array that replaced the DIP. For the new project, Motorola selected a 169-pin layout, giving them plenty of room to work with. The design ultimately used only 114 of them. A great debate broke out about how to refer to the underlying design of the new chip in marketing materials. Technically, the 020 was moving from the long-established
NMOS logic design to a
CMOS layout, which requires two transistors per gate. Common knowledge of the era suggested that CMOS cost four times as much as NMOS, and there was a significant amount of the market that believed "CMOS equals bad."
Launch, fabrication problems The design was completed in the summer of 1983 and announced in June 1984. This "super chip" was significant news at the time, with the
New York Times making it a lead story in their business section. The launch price was quoted at $487 each, about the same as the 68000 when it was launched in 1980, but the 68000 was now available for about $15. However, it was understood that it would be some time before computers using the new chip would be available, as existing designs would have to be heavily modified to take advantage of its performance. The announcement led to Motorola's customers clamouring for supply. At this point, serious supply problems became evident. The design had been laid out to be built in the same MOS-8 factory as the 68000, although several new pieces of equipment were introduced to support it. By the time of the public release, the yield for the new chip was zero. That is, for every wafer sent through the multi-step process, zero working chips would be produced. Gary Johnson concluded the problem was the floor manager of MOS-8, Tom Felesi, and decided to replace him with Bill Walker, who was at that time running the older MOS-2 factory. Walker arrived at the plant on 5 July 1985 to find Johnson had not bothered to tell Felesi of the change, and arguments followed. Johnson eventually told Felesi this was indeed happening. Walker then toured the plant and found it had been turned into what was essentially a
research and development lab, not a production line, with numerous bits of machinery in use nowhere else. One significant issue was a new piece of equipment from a new vendor, Genus, which produced tungsten
silicide. The machine simply didn't work. Walker flew to California to meet with the CEO of Genus, who offered up nothing but excuses. Walker eventually slammed his hand down on the desk, breaking his watch band, and stated "No more excuses! I want this thing fixed now, today!" Genus took the demand seriously and fixed the machine. The CEO later sent Walker a new watch band to commemorate the event. Meanwhile, Walker instituted a new policy at MOS-8 to improve the plant itself. He normally called meetings at 6:30 AM. If things were not going well, he would move that up to 5:30, and even 4:30. This provided a strong incentive to get the plant running. The production problems were soon ironed out, and volume deliveries began late that year. By this point, their workstation customers had already developed complete systems ready to use the 020 and the new floating point unit, the
Motorola 68881. Systems were in the market only five or six months after the 020 had been announced.
Replacement Design of the 020's follow-on began almost immediately. As part of their ongoing work with Hitachi, Motorola's fabrication system was finally catching up with the competition, as was their internal design workflow. This gave them considerably more room to work with, allowing the addition of larger
processor caches, a built-in
memory management unit (MMU) and other features. The
Motorola 68030 was announced in September 1986, with deliveries to begin the next summer. Due to the changes in the production lines, the new 030 would have a lower launch price than the 020. There were significant differences between the 68000 and 020, especially the 32-bit memory interface. This required computer designs using it to be considerably different from earlier models. In contrast, there were few changes between the 020 and 030, the latter of which could be used as a drop-in replacement in many roles. For this reason, designs using the 030 appeared much more quickly after its release than the 020. The first
Macintosh with the 020 was the
Macintosh II released in March 1987, two years after the 020 had become widely available, with low-volume initial shipments starting two months later. Only eighteen months later, the
Macintosh IIx replaced it, using the 030. Although it ran at the same 16 MHz clock speed, the IIx offered 3.9 MIPS compared to the II's 2.6. == Description ==