The project was started in 1979, with trial production in 1980 and mass production starting in December 1981. It was first used in the NEC (known in North America as the
NEC APC or "Advanced Personal Computer") in 1981. The N5200 sported a 5 MHz
Intel 8086 processor on a 16-bit bus, and came with a text-only display board using a μPD7220 (in
text mode). An optional graphics-only display board, sporting a second μPD7220 chip (operating in graphics mode), "merged" the text and graphics video through an XOR port (on each of the
RGB signals) in hardware. The only OS on the original NEC APC was the
UCSD p-System, but
CPM/86 support was added in 1982. In 1981, an English language paper written in 1980 by Tetsuji Oguchi, Misao Higuchi, Takashi Uno, Michiori Kamaya and Munekazu Suzuki was published in the
IEEE. NEC deployed the chip in other computers, such as the NEC PC-9801, and NEC's APC II and later APC III computers, and also released it to other manufacturers in Japan, starting in 1982. The same year, the 7220 was revealed in North America by NEC Information Systems, the US arm of NEC. By 1983, it was used in other early computers, from NEC and other companies including
Digital Equipment Corporation and
Wang Laboratories. While most computers used memory mapped character, or
bit-mapped displays, those with a μPD7220 had access to a, for the time, sophisticated graphics co-processor. The controller could either be used as a simple character display with user defined typefaces and simultaneously as an all-points addressable graphics display. Additionally, the controller had hardware assist features for drawing straight lines and sectors of circles. It would draw pixels along a line, a circular arc or from user defined characters in under 800 ns. This released the host computer to continue other processing while the drawing operation continued. The high-resolution capability permitted support for glyph-based languages like
Japanese that were difficult to comprehensively support with character-based displays. The large memory space, combined with hardware viewport registers permitted smooth high-speed
scrolling. Compatibility with
direct memory access hardware made it possible to move
bitmaps to and from the controller memory at bus-limited rates. In this way, bitmaps could be
blitted around the display at high speed and the controller kept focused on the more complex rendering tasks. The controller could address a maximum pixel display with
four-bit colour depth, generating 16 colors or grayscale levels. It included a
light pen interface that synchronised the pixel clock to input signals without additional processor support.
GKS was available on
CP/M and
MS-DOS systems and formed the basis of early 1980s
CAD platforms on otherwise limited hardware platforms. A few years after its introduction, one journalist said "The 7220 GDC chip is a component that even some of NEC's competitors have found too good to pass up."
Bruce Daniels pointed out that the Lisa primarily used raster graphics (known as bitmap graphics at the time), which could be implemented with less expensive hardware support. Instead, graphics primitives were written in software. Development manager
Wayne Rosing added that although the team knew about the 7220, it was not quite available when the design began. There were also restrictions on when the display memory could be accessed: only during certain times in the
vertical refresh cycle. Announced in 1982, it was the first of what would become a long line of
Intel graphics processing units. •
East Germany (the German Democratic Republic) produced a replica designated
U82720, used with the
U880 replica of the
Zilog Z80. • The faster
complementary metal–oxide–semiconductor (CMOS) variant was given the designation μPD72
020. • A follow-on project produced the μPD72
120 Advanced Graphics Display Controller (AGDC) which was faster and supported a
16-bit interface. It was named one of the "Top 100" products of 1987 by
Electronics Design.
Internals Two I/O channels are used, addressing A0 and A1. Reading A0 retrieves the 7220 status. Reading A1 fetches the first byte from the internal queue. Writing to the 7220 uses both
registers; A1 for writing the command, A0 for writing the parameters to the queue. Parts were available with clocks running from 4 MHz to 5.5 MHz, which was considered relatively high-performance for the time. ==References==