x86 processors include a parity flag because they are descended (via the
Intel 8086,
8080 and
8008) from the
Datapoint 2200 terminal, which was designed for serial communication duties. In x86 processors, the parity flag reflects the parity of only the
least significant byte of the result, and is set if the number of set bits of ones is even (put another way, the parity bit is set if the sum of the bits is even). According to the
Intel 80386 manual, the parity flag is changed in the x86 processor family by the following instructions: • All arithmetic instructions; • Compare instruction (equivalent to a subtract instruction without storing the result); • Logical instructions - XOR, AND, OR; • the
TEST instruction (equivalent to the AND instruction without storing the result). • Instructions which write to the entire flags register: POPF, IRET, interrupts, or any other instruction which causes a
hardware task switch. The parity flag is tested by conditional jump instructions; the JP instruction jumps to the given target when the parity flag is set and the JNP instruction jumps if it is not set. The flag may be also read directly with instructions such as PUSHF, which pushes the flags register on the stack. One common reason to test the parity flag is to check an unrelated x87-FPU flag. The
FPU has four condition flags (C0 to C3), but they can not be tested directly, and must instead be first copied to the flags register. When this happens, C0 is placed in the
carry flag, C2 in the parity flag and C3 in the
zero flag. The C2 flag is set when e.g. incomparable
floating point values (
NaN or unsupported format) are compared with the FUCOM instructions. == References ==