PL-3

There are two broad categories of chip-to-chip interfaces. The first, exemplified by PCI-Express and HyperTransport, supports reads and writes of memory addresses. The second broad category carries user packets over 1 or more channels and is exemplified by the IEEE 802.3 family of Media Independent Interfaces and the Optical Internetworking Forum family of System Packet Interfaces. Of these last two, the family of System Packet Interfaces is optimized to carry user packets from many channels. The family of System Packet Interfaces is the most important packet-oriented, chip-to-chip interface family used between devices in the Packet over SONET and Optical Transport Network, which are the principal protocols used to carry the internet between cities. ==Applications==

It was designed to be used in systems that support OC-48 SONET interfaces . A typical application of PL-3 (SPI-3) is to connect a framer device to a network processor. It has been widely adopted by the high speed networking marketplace. ==Technical details==

The interface consists of (per direction): • 32 TTL signals for the data path • 8 TTL signals for control • one TTL signal for clock • 8 TTL signals for optional additional multi-channel status There are several clocking options. The interface operates around 100 MHz. Implementations of SPI-3 (PL-3) have been produced which allow somewhat higher clock rates. This is important when overhead bytes are added to incoming packets. ==PL-3 in the marketplace==

PL-3 and SPI-3 were highly successful interfaces with many semiconductor devices produced to it. ==See also==