R3000

The MIPS 1 instruction set is small compared to those of the contemporary 80x86 and 680x0 architectures, encoding only more commonly used operations and supporting few addressing modes. Combined with its fixed instruction length and only three different types of instruction formats, this simplified instruction decoding and processing. It employed a 5-stage instruction pipeline, enabling execution at a rate approaching one instruction per cycle, unusual for its time. The architecture makes use of a branch delay slot. The compilers for the R3000 available from MIPS Computer Systems were typically able to fill the delay slot some 70 to 90 percent of the time. In some military applications, the figure was 75 to 80 percent occupied. The CP works as a coprocessor. Besides the CP, the R3000 can also support an external R3010 numeric coprocessor, along with two other external coprocessors. The R3000 CPU does not include level 1 cache. Instead, its on-chip cache controller operates external data and instruction caches of up to 256 KB each. It can access both caches during the same clock cycle. The R3000 was a further development of the R2000 with minor improvements including larger TLB and a faster bus to the external caches. The R3000 die contained 115,000 transistors and measured about 75,000 square mils (48 mm2). MIPS was a fabless semiconductor company, so the R3000 was fabricated by MIPS partners including Integrated Device Technology (IDT), LSI Logic, NEC Corporation, Performance Semiconductor, and others. It was fabricated in a 1.2 μm complementary metal–oxide–semiconductor (CMOS) process with two levels of aluminium interconnect. ==Use in workstations and servers==

The RISC approach found much success and was quickly used by many companies in their workstations and servers. Those using the R3000 included: • Ardent Computer • Atari CoJag (A modified Atari Jaguar for arcade systems). • Digital Equipment Corporation (DEC) for their DECstation workstations and multiprocessor DECsystem servers. • Evans & Sutherland for their Vision (ESV) series workstations. • LSI Logic for their CW4003 RISC processor core and DCAM-101 system-on-a-chip. Derivatives of the R3000 for non-embedded applications include: • R3000A - A further development by MIPS introduced in 1989. It operated at clock frequencies up to 40 MHz. • PR3400 - Developed by Performance Semiconductor, introduced in May 1991, also at up to 40 MHz. It integrated the Performance Semiconductor PR3000A and PR3010A onto a single die. ==Use in real-time systems==

The MIPS R3000 could be used for real-time computing; indeed, an editor of Computer Design journal characterized the R3000 as "about the cleanest of the RISC processors to implement a real-time operating system". The R3000 was used as an embedded systems microprocessor by a number of companies: • Heurikon Corporation, with their HKMIPS/3500 board The Joint Integrated Avionics Working Group (JIAWG), a United States government initiative of the late 1980s intended to establish common standards for the next generation of U.S. Air Force, Navy, and Army aircraft, selected the R3000 as one of two 32-bit instruction set architectures for real-time embedded systems applications (the other being the Intel i960). In defense industry uses, the R3000 was often a successor to the 16-bit MIL-STD-1750A architecture. ==Use in other lower-cost designs==

Even after advances in technology rendered the R3000 obsolete for high-performance systems, it found continued use in lower-cost designs. Derivatives of the R3000 for embedded applications include: • CW4003, DCAM-101 - Aimed at digital camera applications, the CW4003 core featured a "multiplier-addition bolt-on" (MABO) unit for accelerated integer arithmetic and a pixel-processing accelerator (PPA) unit accessible via the coprocessor 2 interface. The DCAM-101 combined the CW4003 core with modules interfacing to a camera sensor, display, storage and other peripherals, also incorporating a JPEG compression/decompression unit. • PR31500, PR31700 - Microprocessors from Philips Semiconductors used in the Philips Velo handheld PC range. The 75 MHz PR31700 was fabricated in a 350 nm process, delivered in a 208-pin LQFP, it operated at 3.3 V and dissipated only 350 mW. • RISController - A family of embedded microprocessors from IDT. Models included the R3041, R3051, R3052, R3071 and R3081. All models included integrated L1 caches. Higher-end models included larger caches and optional MMUs and FPUs. They competed with the intel i960 and AMD 29000. • TX3900 - A microcontroller from Toshiba. • Mongoose-V - A radiation-hardened and expanded 10–15 MHz CPU for use on spacecraft, it is still in use today in applications such as NASA's New Horizons space probe. ==References==