The data in a semiconductor memory chip is stored in tiny circuits called
memory cells. Sense Amplifiers are primarily applied in
Volatile memory cells. The memory cells are either
SRAM or
DRAM cells which are laid out in rows and columns on the chip. Each line is attached to each cell in the row. The lines which run along the rows are called
wordlines which are activated by putting a voltage on it. The lines which run along the columns are called
bit-line and two such complementary bitlines are attached to a sense amplifier at the edge of the array. Number of sense amplifiers are of that of the "bitline' on the chip. Each cell lies at the intersection of a particular wordline and bitline, which can be used to "address" it. The data in the cells is read or written by the same
bit-lines which run along the top of the rows and columns.
SRAM operation To read a bit from a particular memory cell, the wordline along the cell's row is turned on, activating all the cells in the row. The stored value (Logic 0 or 1) from the cell then comes to the Bit-lines associated with it. The sense amplifier at the end of the two complementary bit-lines amplify the small voltages to a normal logic level. The bit from the desired cell is then latched from the cell's sense amplifier into a buffer, and put on the output bus.
DRAM operation The sense amplifier operation in
DRAM is quite similar to the SRAM, but it performs an additional function. The data in DRAM chips is stored as
electric charge in tiny
capacitors in the memory cells. The read operation depletes the charge in a cell, destroying the data, so after the data is read out the sense amplifier must immediately write it back in the cell by applying a voltage to it, recharging the capacitor. This is called
memory refresh.
Design objectives As part of their designs, sense amplifiers aim at a minimum sense delay, required level of amplification, minimum power consumption, fit into restricted layout areas, and high reliability and tolerance. == See also ==