In contrast, program and data memory are indistinguishable in the
von Neumann architecture, making the way the memory is referenced critical to interpret the correct meaning. Notable examples of American tagged architectures were the
Lisp machines, which had
tagged pointer support at the hardware and
opcode level, the
Burroughs B6500 and successors, which have a data-driven tagged and descriptor-based architecture, and the non-commercial
Rice Computer. Both the Burroughs and Lisp machine are examples of
high-level language computer architectures, where the tagging is used to support types from a
high-level language at the hardware level. In addition to this, the original
Xerox Smalltalk implementation used the
least-significant bit of each 16-bit word as a tag bit: if it was clear then the hardware would accept it as an
aligned memory address while if it was set it was treated as a (
shifted) 15-bit integer. Current Intel documentation mentions that the lower bits of a memory address might be similarly used by some
interpreter-based systems. In the Soviet Union, the
Elbrus series of
supercomputers pioneered the use of tagged architectures in 1973. The
RISC-V J extension and memory-tagging extension (Zimt) both propose adding some support for tagged architecture at the instruction level.
CHERI (Capability Hardware Enhanced RISC Instructions) uses a tagged architecture to add
capability-based addressing to several existing ISAs such as x86, MIPS, and RISC-V. ==See also==