• technology:
I²L (I/O pins are
TTL compatible) • number of gates: 1616 • gates per square millimeter: 81 • clock frequency: 1 MHz, up to 5 MHz •
arithmetic logic unit (ALU) with 16 operations, functionally similar to the
74181 • ten 4-bit registers: working register (
accumulator), extended working register, 8 general registers, of which register 7 has a separate incrementer (intended as the
program counter) • 9-bit
microinstructions which are mapped through a
mask-programmable
PLA to a 20-bit internal control word, which is stored in the 20-bit operations register in order to allow
microinstruction pipelining • the default PLA implements 459 unique microinstructions (out of 512 microinstructions possible for 9 bits) • cascadable to form an 8/12/16-bit processor • parallel access to control functions, data-in, data-out, and address-out • 40-pin DIP (
dual in-line package) • minimum supply voltage: 0,4
V == Teaching computer LCM-1001 ==