MarketIBM 7030 Stretch
Company Profile

IBM 7030 Stretch

The IBM 7030, also known as Stretch, was IBM's first transistorized supercomputer. It was the fastest computer in the world from 1961 until the first CDC 6600 became operational in 1964.

Development history
In early 1955, Dr. Edward Teller of the University of California Radiation Laboratory wanted a new scientific computing system for three-dimensional hydrodynamic calculations. Proposals were requested from IBM and UNIVAC for this new system, to be called Livermore Automatic Reaction Calculator or LARC. According to IBM executive Cuthbert Hurd, such a system would cost roughly $2.5 million and would run at one to two MIPS. Delivery was to be two to three years after the contract was signed. At IBM, a small team at Poughkeepsie including John Griffith and Gene Amdahl worked on the design proposal. Just after they finished and were about to present the proposal, Ralph Palmer stopped them and said, "It's a mistake." In September 1955, fearing that Los Alamos National Laboratory might also order a LARC, IBM submitted a preliminary proposal for a high-performance binary computer based on the improved version of the design that Livermore had rejected, which they received with interest. In January 1956, Project Stretch was formally initiated. In November 1956, IBM won the contract with the aggressive performance goal of a "speed at least 100 times the IBM 704" (i.e. 4 MIPS). Delivery was slated for 1960. During design, it proved necessary to reduce the clock speeds, making it clear that Stretch could not meet its aggressive performance goals, but estimates of performance ranged from 60 to 100 times the IBM 704. In 1960, the price of $13.5 million was set for the IBM 7030. In 1961, actual benchmarks indicated that the performance of the IBM 7030 was only about 30 times the IBM 704 (i.e. 1.2 MIPS), causing considerable embarrassment for IBM. In May 1961, Thomas J. Watson Jr. announced a price cut of all 7030s under negotiation to $7.78 million and immediate withdrawal of the product from further sales. Its floating-point addition time is 1.38–1.50 microseconds, multiplication time is 2.48–2.70 microseconds, and division time is 9.00–9.90 microseconds. ==Technical impact==
Technical impact
While the IBM 7030 was not considered successful, it spawned many technologies incorporated in future machines that were highly successful. The Standard Modular System (SMS) transistor logic was the basis for the IBM 7090 line of scientific computers, the IBM 7070 and 7080 business computers, the IBM 7040 and IBM 1400 lines, and the IBM 1620 small scientific computer; the 7030 used about transistors. The IBM 7302 Model I Core Storage units were also used in the IBM 7090, IBM 7070 and IBM 7080. Multiprogramming, memory protection, generalized interrupts, the eight-bit byte for I/O were all concepts later incorporated in the IBM System/360 line of computers as well as most later central processing units (CPU). Stephen Dunwell, the project manager who became a scapegoat when Stretch failed commercially, pointed out soon after the phenomenally successful 1964 launch of System/360 that most of its core concepts were pioneered by Stretch. By 1966, he had received an apology and been made an IBM Fellow, a high honor that carried with it resources and authority to pursue one's desired research. Instruction pipelining, prefetch and decoding, and memory interleaving were used in later supercomputer designs such as the IBM System/360 Models 91, 95 and 195, and the IBM 3090 series as well as computers from other manufacturers. , these techniques are still used in most advanced microprocessors, starting with the 1990s generation that included the Intel Pentium and the Motorola/IBM PowerPC, as well as in many embedded microprocessors and microcontrollers from various manufacturers. ==Hardware implementation==
Hardware implementation
, Los Alamos, New Mexico The 7030 CPU uses emitter-coupled logic (originally called current-steering logic) on 18 types of Standard Modular System cards. It uses 4,025 double cards (as shown) and 18,747 single cards, holding 169,100 transistors, requiring a total of 21 kW power. It uses high-speed NPN and PNP germanium drift transistors, with cut-off frequency over 100 MHz, and using ~50 mW each. Some third level circuits use a third voltage level. Each logic level has a delay of about 20 ns. To gain speed in critical areas emitter-follower logic is used to reduce the delay to about 10 ns. It uses the same core memory as the IBM 7090. ==Installations==
Installations
Los Alamos Scientific Laboratory (LASL) in April 1961, accepted in May 1961, and used until June 21, 1971. • Lawrence Livermore National Laboratory, Livermore, California delivered November 1961. • U.S. Weather Bureau Washington D.C., delivered June/July 1962. • MITRE Corporation, delivered December 1962. and used until August 1971. In the spring of 1972, it was sold to Brigham Young University, where it was used by the physics department until scrapped in 1982. • U.S. Navy Dahlgren Naval Proving Ground, delivered Sep/Oct 1962. • Commissariat à l'énergie atomique, France, delivered November 1963. • IBM. The Lawrence Livermore Laboratory's IBM 7030 (except for its core memory) and portions of the MITRE Corporation/Brigham Young University IBM 7030 now reside in the Computer History Museum collection, in Mountain View, California. ==Architecture==
Architecture
Data formatsFixed-point numbers are variable in length, stored in either binary (1 to 64 bits) or decimal (1 to 16 digits) and either unsigned format or sign/magnitude format. Fields may straddle word boundaries. In decimal format, digits are variable length bytes (four to eight bits). • Floating-point numbers have a 1-bit exponent flag, a 10-bit exponent, a 1-bit exponent sign, a 48-bit magnitude, and a 4-bit sign byte in sign/magnitude format. • Alphanumeric characters are variable length and can use any character code of 8 bits or less. • Bytes are variable length (one to eight bits). Instruction format Instructions are either 32-bit or 64-bit. Registers The registers overlay the first 32 addresses of memory as shown. The accumulator and index registers operate in sign-and-magnitude format. Memory Main memory is 16K to 256K 64-bit binary words, in banks of 16K. The memory was immersion oil-heated/cooled to stabilize its operating characteristics. ==Software==
Software
STRETCH Assembly Program (STRAP) • MCP (not to be confused with the Burroughs MCP) • COLASL and IVY programming languages • FORTRAN programming language • SOS (Stretch Operating System), written at the BYU Scientific Computing Center as an upgrade to MCP, along with an updated variant of FORTRAN ==See also==
tickerdossier.comtickerdossier.substack.com