In early computers without any form of
indirect addressing, array operations had to be performed by
modifying the instruction address, which required several additional program steps and used up more computer memory, a scarce resource in computer installations of the early era (as well as in early microcomputers two decades later). Index registers, commonly known as B-lines in early British computers, as B-registers on some machines and as X-registers on others, were first used in the
British Manchester Mark 1 computer, in 1949. In general, index registers became a standard part of computers during the technology's
second generation, roughly 1954–1966. Most machines in the
IBM 700/7000 mainframe series had them, starting with the
IBM 704 in 1954, though they were optional on some smaller machines such as the
IBM 650 and
IBM 1401. Early "small machines" with index registers include the
AN/USQ-17, around 1960, and the
9 series of
real-time computers from
Scientific Data Systems, from the early 1960s. The 1962
UNIVAC 1107 has 15 X-registers, four of which were also A-registers. The 1964
GE-635 has 8 dedicated X-registers; however, it also allows indexing by the instruction counter or by either half of the A or Q register. The
Digital Equipment Corporation (DEC)
PDP-6, introduced in 1964, and the
IBM System/360, announced in 1964, do not include dedicated index registers; instead, they have
general-purpose registers (called "accumulators" in the PDP-6) that can contain either numerical values or addresses. The memory address of an operand is, in the PDP-6, the sum of the contents of a general-purpose register and an 18-bit offset and, on the System/360, the sum of the contents of two general-purpose registers and a 12-bit offset. The compatible
PDP-10 line of successors to the PDP-6, and the
IBM System/370 and later compatible successors to the System/360, including the current
z/Architecture, work in the same fashion. The 1969
Data General Nova and successor
Eclipse, and 1970 DEC
PDP-11,
minicomputers also provided general-purpose registers (called "accumulators" in the Nova and Eclipse), rather than separate accumulators and index registers, as did their
Eclipse MV and
VAX 32-bit
superminicomputer successors. In the PDP-11 and VAX, any register could be used when calculating the memory address of an operand; in the Nova, Eclipse, and Eclipse MV, only registers 2 and 3 could be used. The 1971
CDC STAR-100 has a register file of 256 64-bit registers, 9 of which are reserved. Unlike most computers, the STAR-100 instructions only have register fields and operand fields, so the registers serve more as pointer registers than as traditional index registers. While the 1972
Intel 8008 allowed indirect addressing via register pairs, the first
microprocessor with a true index register appears to have been the 1974
Motorola 6800. In 1975, the 8-bit
MOS Technology 6502 processor had two index registers 'X' and 'Y'. In 1978, the
Intel 8086, the first
x86 processor, had eight 16-bit registers, referred to as "general-purpose", all of which can be used as integer data registers in most operations; four of them, 'SI' (source index), 'DI' (destination index), 'BX' (base), and 'BP' (base pointer), can also be used when computing the memory address of an operand, which is the sum of one of those registers and a displacement, or the sum of one of 'BX' or 'BP", one of 'SI' or 'DI', and a displacement. The 1979
Intel 8088, and the 16-bit
Intel 80186,
Intel 80188, and
Intel 80286 successors work the same. In 1985, the
i386, a 32-bit successor to those processors, introducing the
IA-32 32-bit version of the x86 architecture, extended the eight 16-bit registers to 32 bits, with "E" added to the beginning of the register name; in IA-32, the memory address of an operand is the sum of one of those eight registers, one of seven of those registers (the stack pointer is not allowed as the second register here) multiplied by 1, 2, 4, or 8, and a displacement. The
Advanced Micro Devices Opteron, the first model of which was released in 2003, introduced
x86-64, the 64-bit version of the x86 instruction set; in x86-64, the general-purpose registers were extended to 64 bits, and eight additional general-purpose registers were added; the memory address of an operand is the sum of two of those 16 registers and a displacement. In the 64-bit version of the ARM architecture, there are 31 64-bit general-purpose registers plus a stack pointer and a zero register; the memory address of a load or store instruction is the sum of any of the 31 registers and either a displacement or another of the registers. ==Examples==