IBM's 36-bit scientific architecture was used for a variety of computation-intensive applications. First machines were the vacuum-tube
704 and
709, followed by the transistorized
7090, 7094, 7094-II, and the lower-cost
7040 and 7044. The ultimate model was the Direct Coupled System (DCS) consisting of a 7094 linked to a 7044 that handled input and output operations. ;Data formats Numbers are
36 bits long, for both
fixed-point arithmetic and
floating-point arithmetic. • Fixed-point numbers are stored in binary
sign/magnitude format. • Single-precision
floating-point numbers have a magnitude sign, an 8-bit excess-128 exponent and a 27-bit magnitude • Double-precision floating-point numbers, introduced on the 7094, have a magnitude sign, a 17-bit excess-65536 exponent, and a 54-bit magnitude •
Alphameric characters are 6-bit
BCD, packed six to a word. ;Instruction format The basic
instruction format is a three-bit
prefix, fifteen-bit
decrement, three-bit
tag, and fifteen-bit
address. The prefix field specifies the class of instruction. The decrement field often contains an immediate operand to modify the results of the operation, or is used to further define the instruction type. The three bits of the tag specify three (seven in the 7094)
index registers, the contents of which are
subtracted from the address to produce an
effective address. The address field either contains an address or an immediate operand. ;Registers
vacuum tubes (SMS) card used in the 7000 series
Processor registers consist of: • AC – 38-bit
Accumulator • MQ – 36-bit Multiplier-Quotient • XR – 15-bit Index Registers (three or seven) • SI – 36-bit Sense Indicator The accumulator (and multiplier-quotient) registers operate in
sign/magnitude format. The accumulator has two overflow bits, labelled Q and P. Logical instructions clear or ignore S and Q; the Add and Carry Logical (ACL) instruction does an end-around carry from bit P to bit 35. The Index registers operate using
two's complement format and when used to modify an instruction address are
subtracted from the address in the instruction. On machines with three index registers, if the tag has two or three bits set (i.e. selected multiple registers) then their values are ORed together before being subtracted. The IBM 7094, with seven index registers, powers up in
multiple tag mode for compatibility with earlier machines, so that programs that used this trick could continue to be used; the
Leave Multiple Tag Mode (LMTM) instruction turns that mode off, so that the tag specifies which of the index registers to use, and the
Enter Multiple Tag Mode (EMTM) instruction turns it back on. The Sense Indicators permit interaction with the operator via panel switches and lights. ;Memory • 704: 4,096 or 8,192 or 32,768 – 36-bit binary words with six-bit characters • 709, 7090, 7094, 7094 II, 7040, 7044: 32,768 – 36-bit binary words with six-bit characters ;Input/output The 709/7090 series use
Data Synchronizer Channels for high-speed input/output, such as tape and disk. The basic 7-bit DSCs, e.g., 7607, execute their own simple programs from the computer memory that controls the transfer of data between memory and the I/O devices; the more advanced 9-bit 7909 supports more sophisticated channel programs. Because the
unit record equipment on the 709x was so slow,
punched card I/O and
high-speed printing were often performed by transferring magnetic tapes to and from an off-line
IBM 1401. Later, the data channels were used to connect a 7090 to a 7040 or a 7094 to a 7044 to form the
IBM 7094/7044 Direct Coupled System (DCS). In that configuration, the 7044, which could use faster 1400 series peripherals, primarily handled I/O.
FORTRAN assembly program The
FORTRAN Assembly Program (FAP) is an
assembler for the 709, 7090, and 7094, originally written at the Western Data Processing Center by David E. Ferguson and Donald P. Moore for the 709. It runs under IBM's
Fortran Monitor System (FMS) and
IBSYS operating systems. An earlier assembler was SHARE Compiler-Assembler-Translator (SCAT) under
SHARE Operating System (SOS). Macros were added to FAP by Bell Laboratories (BE-FAP), and the final 7090/7094 assembler was Macro Assembly Program (IBMAP), under IBSYS/IBJOB. SCAT, FAP and MAP were mutually incompatible. Its pseudo-operation
BSS, used to reserve memory, is the origin of the common name of the "
BSS section", still used in many
assembly languages today for designating reserved
memory address ranges of the type not having to be saved in the
executable image. == Commercial architecture (702/705/7080)==