display using 1608/0603-type SMD LEDs. Top: A little over half of the 21×86 mm display. Center: Close-up of LEDs in ambient light. Bottom: LEDs in their own red light. Surface-mount components are usually smaller than their counterparts with leads, and are designed to be handled by machines rather than by humans. The
electronics industry has standardized package shapes and sizes (the leading standardisation body is
JEDEC). The codes given in the chart below usually tell the length and width of the components in tenths of millimeters or hundredths of inches. For example, a metric 2520 component is 2.5 mm by 2.0 mm which corresponds roughly to 0.10 inches by 0.08 inches (hence, imperial size is 1008). Exceptions occur for imperial in the two smallest rectangular passive sizes. The metric codes still represent the dimensions in mm, even though the imperial size codes are no longer aligned. Problematically, some manufacturers are developing metric 0201 components with dimensions of , but the imperial 01005 name is already being used for the package. These increasingly small sizes, especially 0201 and 01005, can sometimes be a challenge from a manufacturability or reliability perspective.
Two-terminal packages Rectangular passive components Mostly
resistors and
capacitors.
Tantalum capacitors Aluminum capacitors Small-outline diode (SOD) Metal electrode leadless face (MELF) Mostly
resistors and
diodes; barrel shaped components, dimensions do not match those of rectangular references for identical codes.
DO-214 Commonly used for rectifier, Schottky, and other diodes.
Three- and four-terminal packages Small-outline transistor (SOT) Other • DPAK (TO-252, SOT-428): Discrete Packaging. Developed by
Motorola to house higher powered devices. Comes in three or five-terminal versions. •
D2PAK (TO-263, SOT-404): Bigger than the DPAK; basically a surface mount equivalent of the
TO220 through-hole package. Comes in 3, 5, 6, 7, 8 or 9-terminal versions. • D3PAK (TO-268): Even larger than D2PAK.
Five- and six-terminal packages Small-outline transistor (SOT) package 28-pin chip, upside down to show contacts
Packages with more than six terminals Dual-in-line •
Flatpack was one of the earliest surface-mounted packages. •
Small-outline integrated circuit (SOIC): dual-in-line, 8 or more pins, gull-wing lead form, pin spacing 1.27 mm. •
Small-outline package, J-leaded (SOJ): The same as SOIC except
J-leaded. •
Thin small-outline package (TSOP): thinner than
SOIC with smaller pin spacing of 0.5 mm. •
Shrink small-outline package (SSOP): pin spacing of 0.65 mm, sometimes 0.635 mm or in some cases 0.8 mm. •
Thin shrink small-outline package (TSSOP). • Quarter-size small-outline package (QSOP): with pin spacing of 0.635 mm. • Very small outline package (VSOP): even smaller than QSOP; 0.4-, 0.5-, or 0.65-mm pin spacing. •
Dual flat no-lead (DFN): smaller footprint than leaded equivalent.
Quad-in-line •
Plastic leaded chip carrier (PLCC): square, J-lead, pin spacing 1.27 mm • Quad flat package (
QFP): various sizes, with pins on all four sides • Low-profile quad flat-package (
LQFP): 1.4 mm high, varying sized and pins on all four sides • Plastic quad flat-pack (
PQFP), a square with pins on all four sides, 44 or more pins • Ceramic quad flat-pack (
CQFP): similar to PQFP • Metric quad flat-pack (
MQFP): a QFP package with metric pin distribution • Thin quad flat-pack (
TQFP), a thinner version of LQFP • Quad flat no-lead (
QFN): smaller footprint than leaded equivalent •
Leadless chip carrier (LCC): contacts are recessed vertically to "wick-in" solder. Common in aviation electronics because of robustness to mechanical vibration. • Micro leadframe package (
MLP,
MLF): with a 0.5 mm contact pitch, no leads (same as QFN) • Power quad flat no-lead (
PQFN): with exposed die-pads for heatsinking
Grid arrays •
Ball grid array (BGA): A square or rectangular array of solder balls on one surface, ball spacing typically • Fine-pitch ball grid array (
FBGA): A square or rectangular array of solder balls on one surface • Low-profile fine-pitch ball grid array (
LFBGA): A square or rectangular array of solder balls on one surface, ball spacing typically 0.8 mm • Micro ball grid array (
μBGA): Ball spacing less than 1 mm •
Thin fine-pitch ball grid array (
TFBGA): A square or rectangular array of solder balls on one surface, ball spacing typically 0.5 mm •
Land grid array (LGA): An array of bare lands only. Similar to in appearance to
QFN, but mating is by spring pins within a socket rather than solder. •
Column grid array (CGA): A circuit package in which the input and output points are high-temperature solder cylinders or columns arranged in a grid pattern. •
Ceramic column grid array (CCGA): A circuit package in which the input and output points are high-temperature solder cylinders or columns arranged in a grid pattern. The body of the component is ceramic. •
Lead-less package (LLP): A package with metric pin distribution (0.5 mm pitch).
Non-packaged devices Although surface-mount, these devices require specific process for assembly. •
Chip-on-board (COB), a bare
silicon chip, that is usually an integrated circuit, is supplied without a package (which is usually a lead frame overmolded with
epoxy) and is attached, often with epoxy, directly to a circuit board. The chip is then
wire bonded and protected from mechanical damage and contamination by an epoxy
"glob-top". • Chip-on-flex (COF), a variation of COB, where a chip is mounted directly to a
flex circuit.
Tape-automated bonding process is also a chip-on-flex process as well. • Chip-on-glass (COG), a variation of COB, where a chip, typically a
liquid crystal display (LCD) controller, is mounted directly on glass. • Chip-on-wire (COW), a variation of COB, where a chip, typically a LED or RFID chip, is mounted directly on wire, thus making it a very thin and flexible wire. Such wire may then be covered with cotton, glass or other materials to make into smart textiles or electronic textiles. There are often subtle variations in package details from manufacturer to manufacturer, and even though standard designations are used, designers need to confirm dimensions when laying out printed circuit boards. == See also ==