Machine code

Assembly language provides a relatively direct mapping from a human-readable source code to machine code. The assembly language source code represents numerical codes in machine code, as mnemonics and labels. For example, NOP in assembly for an x86 processor represents the x86 architecture opcode 0x90 in machine code. While it is possible to write a program in machine code, doing so is tedious and error-prone. Therefore, programs are usually written in assembly or, more commonly, in a high-level programming language. ==Instruction set==

A machine instruction encodes an operation as a pattern of bits based on the specified format for the machine's instruction set. Instruction sets differ in various ways. Instructions of a set might all be the same length or different instructions might have different lengths; they might be smaller than, the same size as, or larger than the word size of the architecture. The number of instructions may be relatively small or large. Instructions may or may not have to be aligned on particular memory boundaries, such as the architecture's word boundary. To control a computer's architectural features, machine instructions are created. Examples of features that are controlled using machine instructions: • segment registers • protected address mode • binary-coded decimal (BCD) arithmetic The criteria for instruction formats include: • Instructions most commonly used should be shorter than instructions rarely used. Determining the size of the address field is a choice between space and speed. General-purpose instructions control: • Data movement from one place to another • Monadic operations that have one operand to produce a result • Dyadic operations that have two operands to produce a result • Comparisons and conditional jumps • Procedure calls • Loop control • Input/output Overlapping instruction On processor architectures with variable-length instruction sets An example of this use is the IBM System/360 family of computers and their successors. ==Examples==

IBM 709x The IBM 704, 709, 704x and 709x store one instruction in each instruction word; IBM numbers the bit from the left as S, 1, ..., 35. Most instructions have one of two formats: ;Generic :S,1-11 :12-13 Flag, ignored in some instructions :14-17 unused :18-20 Tag :21-35 Y ;Index register control, other than TSX :S,1-2 Opcode :3-17 Decrement :18-20 Tag :21-35 Y For all but the IBM 7094 and 7094 II, there are three index registers designated A, B and C; indexing with multiple 1 bits in the tag subtracts the logical or of the selected index registers and loading with multiple 1 bits in the tag loads all of the selected index registers. The 7094 and 7094 II have seven index registers, but when they are powered on they are in multiple tag mode, in which they use only the three of the index registers in a fashion compatible with earlier machines, and require a Leave Multiple Tag Mode (LMTM) instruction in order to access the other four index registers. The effective address is normally Y-C(T), where C(T) is either 0 for a tag of 0, the logical or of the selected index registers in multiple tag mode or the selected index register if not in multiple tag mode. However, the effective address for index register control instructions is just Y. A flag with both bits 1 selects indirect addressing; the indirect address word has both a tag and a Y field. In addition to transfer (branch) instructions, these machines have skip instruction that conditionally skip one or two words, e.g., Compare Accumulator with Storage (CAS) does a three way compare and conditionally skips to NSI, NSI+1 or NSI+2, depending on the result. MIPS The MIPS architecture provides a specific example for a machine code whose instructions are always 32 bits long. The general type of instruction is given by the op (operation) field, the highest 6 bits. J-type (jump) and I-type (immediate) instructions are fully specified by op. R-type (register) instructions include an additional funct (function) field to determine the exact operation. The fields used in these types are: 6 5 5 5 5 6 bits [ op | rs | rt | rd |shamt| funct] R-type [ op | rs | rt | address/immediate] I-type [ op | target address ] J-type rs, rt, and rd indicate register operands; shamt gives a shift amount; and the address or immediate fields contain an operand directly. For example, adding the registers 1 and 2 and placing the result in register 6 is encoded: [ op | rs | rt | rd |shamt| funct] 0 1 2 6 0 32 decimal 000000 00001 00010 00110 00000 100000 binary Load a value into register 8, taken from the memory cell 68 cells after the location listed in register 3: [ op | rs | rt | address/immediate] 35 3 8 68 decimal 100011 00011 01000 00000 00001 000100 binary Jumping to the address 1024: [ op | target address ] 2 1024 decimal 000010 00000 00000 00000 10000 000000 binary ==Bytecode==

Machine code is similar to yet fundamentally different from bytecode. Like machine code, bytecode is typically generated (i.e. by a compiler) from source code. But, unlike machine code, bytecode is not directly executable by a CPU. An exception is if a processor is designed to use bytecode as its machine code, such as the Pascal MicroEngine or a Java processor. If bytecode is processed by a software interpreter, then that interpreter is a virtual machine for which the bytecode is its machine code. ==Storage==

During execution, machine code is generally stored in RAM although running from ROM is supported by some devices. Regardless, the code may also be cached in more specialized memory to enhance performance. There may be different caches for instructions and data, depending on the architecture. From the point of view of a process, the machine code lives in code space, a designated part of its address space. In a multi-threading environment, different threads of one process share code space along with data space, which reduces the overhead of context switching considerably as compared to process switching. ==Readability==

Machine code is generally considered to be not human readable, with Douglas Hofstadter comparing it to examining the atoms of a DNA molecule. However, various tools and methods support understanding machine code. Disassembly decodes machine code to assembly language which is possible since assembly instructions can often be mapped one-to-one to machine instructions. A decompiler converts machine code to a high-level language, but the result can be relatively obfuscated (hard to understand). A program can be associated with debug symbols (either embedded in the native executable or in a separate file) that allow it to be mapped to external source code. A debugger reads the symbols to help a programmer interactively debug the program. Examples include: • The SHARE Operating System (1959) for the IBM 709, IBM 7090, and IBM 7094 computers allowed for an loadable code format named SQUOZE. SQUOZE was a compressed binary form of assembly language code and included a symbol table. • Modern IBM mainframe operating systems, such as z/OS, have available a symbol table named Associated data (ADATA). The table is stored in a file that can be produced by the IBM High-Level Assembler (HLASM), either as a separate SYSADATA file or as ADATA records in a Generalized object output file (GOFF). This obsoletes the TEST records from OS/360, although it is still possible to request them and to use them in the TSO TEST command. • Windows uses a symbol table that is stored in a program database () file. • Most Unix-like operating systems have available symbol table formats named stabs and DWARF. In macOS and other Darwin-based operating systems, the debug symbols are stored in DWARF format in a separate file. ==See also==