NEC SX-Aurora TSUBASA

SX-Aurora TSUBASA is a successor to the NEC SX series and SUPER-UX, which are vector computer systems upon which the Earth Simulator supercomputer is based. Its hardware consists of x86 Linux hosts with vector engines (VEs) connected via PCI express (PCIe) interconnect. High memory bandwidth (0.75–1.2 TB/s), comes from eight cores and six HBM2 memory modules on a silicon interposer implemented in the form-factor of a PCIe card. Operating system functionality for the VE is offloaded to the VH and handled mainly by user space daemons running the VEOS. Depending on the clock frequency (1.4 or 1.6 GHz), each VE CPU has eight cores and a peak performance of 2.15 or 2.45 TFLOPS in double precision. The processor has the world's first implementation of six HBM2 modules on a Silicon interposer with a total of 24 or 48 GB of high bandwidth memory. It is integrated in the form-factor of a standard full length, full height, double width PCIe card that is hosted by an x86_64 server, the Vector Host (VH). The server can host up to eight VEs, clusters VHs can scale to arbitrary number of nodes. Version 1 Vector Engine The version 1.0 of the Vector Engine was produced in 16 nm FinFET process (from TSMC) and released in three SKUs (subsequent versions add an E at the end): Functional units Each of the eight SX-Aurora cores has 64 logical vector registers. The cores of a vector engine share 16 MB of "Last-Level-Cache" (LLC), a write-back cache directly connected to the vector registers and the L2 cache of the SPU. The LLC cache line size is 128 Bytes. The priority of data retention in the LLC can to some extent be controlled in software, allowing the programmer to specify which of the variables or arrays should be retained in cache, a feature comparable to that of the Advanced Data Buffer (ADB) of the NEC SX-ACE. Platforms NEC is currently selling the SX-Aurora TSUBASA vector engine integrated into four platforms: All types are exclusively air cooled with the exception of the A500 series, which also utilizes watercooling. == Software ==

Operating system The operating system of the vector engine (VE) is called "VEOS", and has been offloaded entirely to the host system, the vector host (VH). VEOS consists of kernel modules and user space daemons that: • manage VE processes and their scheduling on the VE • manage the virtual memory address spaces of the VE processes • handle transfers between VH and VE memory with the help of the VE DMA engines • handle interrupts and exceptions of VE processes, as well as their system calls. VEOS supports multitasking on the VE and almost all Linux system calls are supported in the VE libc. • Performance optimization tools: ftraceviewer and veperf. • Optimized numerical libraries for the VE: BLAS, SBLAS, LAPACK, SCALAPACK, ASL, Heterosolver. NEC MPI is also a proprietary implementation and is conforming to the MPI-3.1 standard specification. Hybrid programs can be created that use the VE as an accelerator for certain host kernel functions by using VE offloading C-API. To some extent VE offloading is comparable to OpenCL and CUDA, but provides a simpler API and allows the kernels to be developed in normal C, C++ or Fortran and use almost any syscall on the VE. Python bindings to VEO are available at . Comparison of Mathematical Functions 1 NEC Numerical Library Collection is a collection of mathematical libraries that supports the development of numerical simulation programs. == References ==