VisualSim provides modeling libraries for model-driven systems engineering activities. Libraries are used during the specification to optimize and validate the specification; during the hardware and software development phase to come up with the optimal architecture; and during the product debugging and testing phase to match the actual output with a set of expected results. VisualSim at the level of deriving Systems Specifications provides a complete visual inspection of the system operation as a combination of traffic input, behavioral system definition, and sink. This solution augments tools such as MatLab/Simulink and UML/SysML by providing very early visibility into the full system operation without getting into the details of the algorithm and code-level implementation. Typical example use cases would be Multimedia SoC with Network-On-Chip, In-Car networks using Ethernet, CAN, LIN and FlexRay, Submarine Inertial systems, etc. VisualSim modeling at the level of Hardware and Software is built after the system specification has been optimized and validated. The design can be refined by adding specific hardware implementation details, logic, and cycle-level timing to the VisualSim model. The device can be a board, set of boards, SoC, sub-system, or an Intellectual Property (IP). Implementation details can include the processor pipeline, functional cache, accelerators and bus arbiters. These refinements provide cycle-by-cycle and address-level evaluation of the system's functionality, performance, and power. The libraries are at statistical, functional, and cycle-accurate levels of abstraction. As VisualSim libraries are embedded with timing and power details, the same model provides both performance computational results and power measurement values. Libraries can be configured to a specific technology manually or using a text or CSV file. If an architect wants to evaluate system behavior or performance with custom components, then he/she can modify library configurations by changing library parameters. An example of a Robotic Computer vision system model.
Semiconductor libraries Semiconductor Systems Modeling toolkits generate transaction-level and cycle-accurate models of complex, hardware devices. Using this generator and the associated hardware architecture library, platform architecture can be defined graphically without the need to write C code or create complex spreadsheets of the instruction sets. The virtual platform can be used to select components, optimize component size and speed, and define arbitration algorithms. VisualSim modeling library blocks help in rapid model construction and early system bottleneck prediction.
Standard libraries Memory technologies: SDR, DDR,
DDR2,
DDR3, LPDDR, LPDDR2, LPDDR3, LPDDR4, Flash,
RAMBUS Processor Kit:
ARM Cortex (A, R, M) series,
PowerPC, Intel, TI, AMD, Marvel Bus/Interfaces: AMBA AHB, APB, AXI, PCI, PCI-X, PCIe, RapidIO, SPI, NVMe, CoreConnect, FSB, BSB == References ==