;Stacking: An even number of diode-capacitor cells is used in any column so that the cascade ends on a smoothing cell. If it were odd and ended on a clamping cell the
ripple voltage would be very large. Larger capacitors in the connecting column also reduce ripple but at the expense of charging time and increased diode current.
Dickson charge pump The
Dickson charge pump, or
Dickson multiplier, is a modification of the
Greinacher/Cockcroft–Walton multiplier. There are, however, several important differences: • The Dickson multiplier takes a
DC supply as its input so is a form of
DC-to-DC converter. In addition to the DC input, the circuit requires a feed of two
clock pulse trains with an amplitude swinging between the DC supply rails. These pulse trains are in antiphase. • The Dickson multiplier is intended for
low-voltage applications, unlike Greinacher/Cockcroft–Walton, which is commonly used in high-voltage applications. This is because the final capacitor has to hold the entire output voltage, whereas in the Greinacher/Cockcroft–Walton multiplier, each capacitor holds at most twice the input voltage (thus easily allowing multiplication by a factor of 10 or more). To describe the ideal operation of the circuit, number the diodes D1, D2, etc., from left to right, and the capacitors C1, C2, etc. When the clock \phi_1 is low, D1 will charge C1 to
Vin. When \phi_1 goes high, the top plate of C1 is pushed up to 2
Vin. D1 is then turned off and D2 turned on and C2 begins to charge to 2
Vin. On the next clock cycle, \phi_1 again goes low and now \phi_2 goes high, pushing the top plate of C2 to 3
Vin. D2 switches off, and D3 switches on, charging C3 to 3
Vin and so on with charge passing up the chain, hence the name
charge pump. The final diode-capacitor cell in the cascade is connected to ground rather than a clock phase and hence is not a multiplier; it is a
peak detector which merely provides
smoothing. There are a number of factors which reduce the output from the ideal case of
nVin. One of these is the threshold voltage,
VT of the switching device, that is, the voltage required to turn it on. The output will be reduced by at least
nVT due to the voltage drops across the switches.
Schottky diodes are commonly used in Dickson multipliers for their low forward voltage drop, amongst other reasons. Another difficulty is that there are
parasitic capacitances to ground at each node. These parasitic capacitances act as voltage dividers with the circuit's storage capacitors reducing the output voltage still further. Up to a point, a higher clock frequency is beneficial: the ripple is reduced and the high frequency makes the remaining ripple easier to filter. Also, the size of capacitors needed is reduced since less charge needs to be stored per cycle. However, losses through stray capacitance increase with increasing clock frequency, and a practical limit is around a few hundred kilohertz. s (4 stages, 5× multiplier) Dickson multipliers are frequently found in
integrated circuits (ICs) to increase a low-voltage
battery supply to the voltage needed by the IC. Because IC designers and manufacturers benefit from using the same technology and basic device throughout a chip,
CMOS Dickson multipliers often wire
MOSFETs to behave as diodes. The diode-wired MOSFET version of the Dickson multiplier does not work very well at very low voltages because of the large drain-source voltage drops of the MOSFETs. Frequently, a more complex circuit is used to overcome this problem. One solution is to connect in parallel with the switching MOSFET another MOSFET biased into its linear region. This second MOSFET has a lower drain-source voltage than the switching MOSFET would have on its own (because the switching MOSFET is driven hard on), and consequently, the output voltage is increased. The gate of the linear biased MOSFET is connected to the output of the next stage, so that it is turned off while the next stage is charging from the previous stage's capacitor. That is, the linear-biased transistor is turned off at the same time as the switching transistor. An ideal 4-stage Dickson multiplier (5× multiplier) with an input of would have an output of . However, a diode-wired MOSFET 4-stage multiplier might only have an output of . Adding parallel MOSFETs in the linear region improves this to around . More complex circuits still can achieve an output much closer to the ideal case. Many other variations and improvements to the basic Dickson circuit exist. Some attempt to reduce the switching threshold voltage such as the Mandal-Sarpeshkar multiplier or the Wu multiplier. Other circuits cancel out the threshold voltage: the Umeda multiplier does it with an externally provided voltage and the Nakamoto multiplier does it with internally generated voltage. The Bergeret multiplier concentrates on maximising power efficiency.
Modification for RF power In CMOS integrated circuits, clock signals are readily available or else easily generated. This is not always the case in
RF integrated circuits, but often a source of RF power will be available. The standard Dickson multiplier circuit can be modified to meet this requirement by simply grounding the normal input and one of the clock inputs. RF power is injected into the other clock input, which then becomes the circuit input. The RF signal is effectively the clock as well as the source of power. However, since the clock is injected only into every other node, the circuit only achieves a stage of multiplication for every second diode-capacitor cell. The other diode-capacitor cells are merely acting as peak detectors and smoothing the ripple without increasing the multiplication.
Cross-coupled switched capacitor A voltage multiplier may be formed of a cascade of voltage doublers of the
cross-coupled switched capacitor type. This type of circuit is typically used instead of a Dickson multiplier when the source voltage is or less. Dickson multipliers have increasingly poor power conversion efficiency as the input voltage drops because the voltage drop across the diode-wired transistors becomes much more significant compared to the output voltage. Since the transistors in the cross-coupled circuit are not diode-wired, the voltage-drop problem is not so serious. The circuit works by alternately switching the output of each stage between a voltage doubler driven by \phi_1 and one driven by \phi_2. This behaviour leads to another advantage over the Dickson multiplier: reduced ripple voltage at double the frequency. The increase in ripple frequency is advantageous because it is easier to remove by filtering. Each stage (in an ideal circuit) raises the output voltage by the peak clock voltage. Assuming that this is the same level as the DC input voltage, then an
n stage multiplier will (ideally) output
nVin. The chief cause of losses in the cross-coupled circuit is parasitic capacitance rather than switching threshold voltage. The losses occur because some of the energy has to go into charging up the parasitic capacitances on each cycle. == Applications ==