I486

The concept of this microprocessor generation was discussed with Pat Gelsinger and John Crawford shortly after the release of 386 processor in 1985. The team started the computer simulation in early 1987. They finalized the logic and microcode function during 1988. The team finalized the database in February 1989 until the tape out on March 1. They received the first silicon from the fabrication on March 20. The i486 was announced at Spring Comdex on April 10, 1989. The first i486-based PCs were announced in late 1989. In fall of 1991, Intel introduced the 50 MHz i486 DX using the three layer 800 nm process CHMOS-V technology. They were available for US$665 in 1,000-unit quantities. The first major update to the i486 design came in March 1992 with the release of the clock-doubled 486DX2 series. It was the first time that the CPU core clock frequency was separated from the system bus clock frequency by using a dual clock multiplier, supporting 486DX2 chips at 40 and 50 MHz. The faster 66 MHz 486DX2-66 was released that August. After 386 competitors appeared, Intel in 1992 lowered the price of the 25-MHz 80486SX to less than that of the 33-MHz 80386. An industry analyst said that Intel wanted customers to move to the competition-free 486. The strategy was very successful; by 1993 Dell reported that 80486-based computers were 70% of sales. AMD continued to create clones, releasing the first-generation Am486 chip in April 1993 with clock frequencies of 25, 33 and 40 MHz. Second-generation Am486DX2 chips with 50, 66 and 80 MHz clock frequencies were released the following year. Even after the Pentium series of processors gained a foothold in the market, however, Intel continued to produce 486 cores for industrial embedded applications. Intel discontinued production of i486 processors in late 2007. ==Improvements==

The instruction set of the i486 is very similar to the i386, with the addition of a few extra instructions, such as CMPXCHG, a compare-and-swap atomic operation, and XADD, a fetch-and-add atomic operation that returned the original value (unlike a standard ADD, which returns flags only). This generation CPU has brought up to 156 different instructions listing. The i486's performance architecture is a vast improvement over the i386. It has an on-chip unified instruction and data cache, an on-chip floating-point unit (FPU) and an enhanced bus interface unit. Due to the tight pipelining, sequences of simple instructions (such as ALU reg,reg and ALU reg,im) could sustain single-clock-cycle throughput (one instruction completed every clock). In other words, it was running about 1.8 clocks per instruction. In other words, with the combination of both CPU and MCP (math coprocessor) provides 40% more performance than with both Intel386 DX and Intel387 DX math coprocessor combined. The older design had to reach 50 MHz to be comparable with a 25 MHz i486 part. Differences between i386 and i486 • An 8 KB on-chip (level 1) SRAM cache stores the most recently used instructions and data (16 KB and/or write-back on some later models). The i386 had no internal cache but supported a slower off-chip cache (not officially a level 2 cache because i386 had no internal level 1 cache). • An enhanced external bus protocol to enable cache coherency and a new burst mode for memory accesses to fill a cache line of 16 bytes within five bus cycles. The 386 needed eight bus cycles to transfer the same amount of data. • Tightly coupled pipelining completes a simple instruction like ALU reg,reg or ALU reg,im every clock cycle (after a latency of several cycles). The i386 needed two clock cycles. • Integrated FPU (disabled or absent in SX models) with a dedicated local bus; together with faster algorithms on more extensive hardware than in the i387, this performed floating-point calculations faster than the i386/i387 combination. • Improved MMU performance. • New instructions: XADD, BSWAP, CMPXCHG, INVD, WBINVD, INVLPG. Just as in the i386, a flat 4 GB memory model could be implemented. All "segment selector" registers could be set to a neutral value in protected mode, or to zero in real mode, and using only the 32-bit "offset registers" (x86-terminology for general CPU registers used as address registers) as a linear 32-bit virtual address bypassing the segmentation logic. Virtual addresses were then normally mapped onto physical addresses by the paging system except when it was disabled (real mode had no virtual addresses). Just as with the i386, circumventing memory segmentation could substantially improve performance for some operating systems and applications. On a typical PC motherboard, either four matched 30-pin (8-bit) SIMMs or one 72-pin (32-bit) SIMM per bank were required to fit the i486's 32-bit data bus. The address bus used 30-bits (A31..A2) complemented by four byte-select pins (instead of A0,A1) to allow for any 8/16/32-bit selection. This meant that the limit of directly addressable physical memory was 4 gigabytes as well (230 32-bit words = 232 8-bit words). ==Models==

Intel offered several suffixes and variants (see table). Variants include: • Intel RapidCAD: a specially packaged Intel 486DX and a dummy floating-point unit (FPU) designed as pin-compatible replacements for an i386 processor and 80387 FPU. • i486SL-NM: i486SL based on i486SX. • i487SX (P23N): i486DX with one extra pin sold as an FPU upgrade to i486SX systems; When the i487SX was installed, it ensured that an i486SX was present on the motherboard but disabled it, taking over all of its functions. • i486 OverDrive (P23T/P24T): i486SX, i486SX2, i486DX2 or i486DX4. Marked as upgrade processors, some models had different pinouts or voltage-handling abilities from "standard" chips of the same speed. Fitted to a coprocessor or "OverDrive" socket on the motherboard, they worked the same as the i487SX. The maximal internal clock frequency (on Intel's versions) ranged from 16 to 100 MHz. The 16 MHz i486SX model was used by Dell Computers. One of the few i486 models specified for a 50 MHz bus (486DX-50) initially had overheating problems and was moved to the 0.8-micrometer fabrication process. However, problems continued when the 486DX-50 was installed in local-bus systems due to the high bus speed, making it unpopular with mainstream consumers. Local-bus video was considered a requirement at the time, though it remained popular with users of EISA systems. The 486DX-50 was soon eclipsed by the clock-doubled i486DX2, which although running the internal CPU logic at twice the external bus speed (50 MHz), was nevertheless slower because the external bus ran at only 25 MHz. The i486DX2 at 66 MHz (with 33 MHz external bus) was faster than the 486DX-50, overall. More powerful i486 iterations such as the OverDrive and DX4 were less popular (the latter available as an OEM part only), as they came out after Intel had released the next-generation Pentium processor family. Certain steppings of the DX4 also officially supported 50 MHz bus operation, but it was a seldom-used feature. : ==Other makers of 486-like CPUs==

U5SX Processors compatible with the i486 were produced by companies such as IBM, Texas Instruments, AMD, Cyrix, UMC, and STMicroelectronics (formerly SGS-Thomson). Some were clones (identical at the microarchitectural level), others were clean room implementations of the Intel instruction set. (IBM's multiple-source requirement was one of the reasons behind its x86 manufacturing since the 80286.) The i486 was, however, covered by many Intel patents, including from the prior i386. Intel and IBM had broad cross-licenses of these patents, and AMD was granted rights to the relevant patents in the 1995 settlement of a lawsuit between the companies. AMD produced several clones using a 40 MHz bus (486DX-40, 486DX/2-80, and 486DX/4-120) which had no Intel equivalent, as well as a part specified for 90 MHz, using a 30 MHz external clock, that was sold only to OEMs. The fastest running i486-compatible CPU, the Am5x86, ran at 133 MHz and was released by AMD in 1995. 150 MHz and 160 MHz parts were planned but never officially released. Cyrix made a variety of i486-compatible processors, positioned at the cost-sensitive desktop and low-power (laptop) markets. Unlike AMD's 486 clones, the Cyrix processors were the result of clean-room reverse engineering. Cyrix's early offerings included the 486DLC and 486SLC, two hybrid chips that plugged into 386DX or SX sockets respectively, and offered 1 KB of cache (versus 8 KB for the then-current Intel/AMD parts). Cyrix also made "real" 486 processors, which plugged into the i486's socket and offered 2 or 8 KB of cache. Clock-for-clock, the Cyrix-made chips were generally slower than their Intel/AMD equivalents, though later products with 8 KB caches were more competitive, albeit late to market. The Motorola 68040, while not i486 compatible, was often positioned as its equivalent in features and performance. Clock-for-clock basis the Motorola 68040 could significantly outperform the Intel chip. However, the i486 had the ability to be clocked significantly faster without overheating. Motorola 68040 performance lagged behind the later production i486 systems. ==Motherboards and buses==

was the first complete 486 system released, as featured on the cover of Byte, September 1989. Early i486-based computers were equipped with several ISA slots (using an emulated PC/AT-bus) and sometimes one or two 8-bit-only slots (compatible with the PC/XT-bus). Many motherboards enabled overclocking of these from the default 6 or 8 MHz to perhaps 16.7 or 20 MHz (half the i486 bus clock) in several steps, often from within the BIOS setup. Especially older peripheral cards normally worked well at such speeds as they often used standard MSI chips instead of slower (at the time) custom VLSI designs. This could give significant performance gains (such as for old video cards moved from a 386 or 286 computer, for example). However, operation beyond 8 or 10 MHz could sometimes lead to stability problems, at least in systems equipped with SCSI or sound cards. Some motherboards came equipped with a 32-bit EISA bus that was backward compatible with the ISA-standard. EISA offered attractive features such as increased bandwidth, extended addressing, IRQ sharing, and card configuration through software (rather than through jumpers, DIP switches, etc.) However, EISA cards were expensive and therefore mostly employed in servers and workstations. Consumer desktops often used the simpler, faster VESA Local Bus (VLB). Unfortunately prone to electrical and timing-based instability; typical consumer desktops had ISA slots combined with a single VLB slot for a video card. VLB was gradually replaced by PCI during the final years of the i486 period. Few Pentium class motherboards had VLB support as VLB was based directly on the i486 bus; much different from the P5 Pentium-bus. ISA persisted through the P5 Pentium generation and was not completely displaced by PCI until the Pentium III era, although ISA persisted well into the Pentium 4 era, especially among industrial PCs. Late i486 boards were normally equipped with both PCI and ISA slots, and sometimes a single VLB slot. In this configuration, VLB or PCI throughput suffered depending on how buses were bridged. Initially, the VLB slot in these systems was usually fully compatible only with video cards (fitting as "VESA" stands for Video Electronics Standards Association); VLB-IDE, multi I/O, or SCSI cards could have problems on motherboards with PCI slots. The VL-Bus operated at the same clock speed as the i486-bus (basically a local bus) while the PCI bus also usually depended on the i486 clock but sometimes had a divider setting available via the BIOS. This could be set to 1/1 or 1/2, sometimes even 2/3 (for 50 MHz CPU clocks). Some motherboards limited the PCI clock to the specified maximum of 33 MHz and certain network cards depended on this frequency for correct bit-rates. The ISA clock was typically generated by a divider of the CPU/VLB/PCI clock. The earliest hardware product to use the i486 chip was IBM's 486/25 Power Platform, a CPU card that plugged into their PS/2 Model 70 386 in order to upgrade it to a 25-MHz i486. Introduced in October 1989, it was recalled a few weeks after its release after reports of bugs in initial batches of the i486 were confirmed by Intel. The first complete computer system to use the i486 chip was the Apricot VX FT, produced by British hardware manufacturer Apricot Computers and released in late 1989. Later i486 boards supported Plug-And-Play, a specification designed by Microsoft that began as a part of Windows 95 to make component installation easier for consumers. Some mid-end and high-end i486 motherboards can include L2 cache integrated in motherboard. ==Obsolescence==

The AMD Am5x86 and Cyrix Cx5x86 were the last i486 processors often used in late-generation i486 motherboards. They came with PCI slots and 72-pin SIMMs that were designed to run Windows 95, and also used for 80486 motherboards upgrades. While the Cyrix Cx5x86 faded when the Cyrix 6x86 took over, the AMD Am5x86 remained important given AMD K5 delays. Computers based on the i486 remained popular through the late 1990s, serving as low-end processors for entry-level PCs. Production for traditional desktop and laptop systems ceased in 1998, when Intel introduced the Celeron brand, though it continued to be produced for embedded systems through the late 2000s. In the general-purpose desktop computer role, i486-based machines remained in use into the early 2000s, especially as Windows 95 through 98 and Windows NT 4.0 were the last Microsoft operating systems to officially support i486-based systems. Windows 2000 could run on an i486-based machine, although with a less than optimal performance (the official "minimum hardware requirement" was a Pentium processor). As they were generally overtaken by newer operating systems, i486 systems fell out of use except for backward compatibility with older programs (most notably games), especially given problems running on newer operating systems. However, support was not removed from some open source operating systems until considerably later. The i486 was eventually overtaken by the Pentium for personal computer applications, although Intel continued production for use in embedded systems. In May 2006, Intel announced that production of the i486 would stop at the end of September 2007. The mainline Linux kernel considered dropping support for i486-class x86 processors in 2022 and 2025. The process of removing support from the Linux kernel has started in April 2026. ==See also==