Athlon Classic (1999) The AMD Athlon processor launched on June 23, 1999, with general availability by August 1999. Subsequently, from August 1999 until January 2002, this initial K7 processor was the fastest x86 chip in the world. At launch it was, on average, 10% faster than the Pentium III at the same clock for business applications and 20% faster for gaming workloads. In commercial terms, the Athlon "Classic" was an enormous success. The Argon-based Athlon contained 22 million transistors and measured 184 mm2. It was fabricated by AMD in a version of their CS44E process, a 250 nm
complementary metal–oxide–semiconductor (CMOS) process with six levels of
aluminium interconnect. "Pluto" and "Orion" Athlons were fabricated in a 180 nm process. split level-1 cache; a
2-way associative cache separated into 2×64 KB for data and instructions (a concept from
Harvard architecture). With later Athlon models, AMD would integrate the L2 cache onto the processor itself, removing dependence on external cache chips. The Slot-A Athlons were the first multiplier-locked CPUs from AMD, preventing users from setting their own desired clock speed. This was done by AMD in part to hinder CPU remarking and overclocking by resellers, which could result in inconsistent performance. Eventually a product called the "Goldfingers device" was created that could unlock the CPU. AMD designed the CPU with more robust x86 instruction decoding capabilities than that of K6, to enhance its ability to keep more data in-flight at once. The critical branch-predictor unit was enhanced compared to the K6. Deeper pipelining with more stages allowed higher clock speeds to be attained. Like the AMD K5 and K6, the Athlon dynamically buffered internal micro-instructions at runtime resulting from parallel x86 instruction decoding. The CPU is an
out-of-order design, again like previous post-5x86 AMD CPUs. The Athlon utilizes the
Alpha 21264's EV6 bus architecture with
double data rate (DDR) technology. AMD ended its long-time handicap with
floating point x87 performance by designing a super-
pipelined, out-of-order, triple-issue
floating-point unit (FPU). The
3DNow! floating-point
SIMD technology, again present, received some revisions and was renamed "Enhanced 3DNow!" Additions included
DSP instructions and the
extended MMX subset of
Intel SSE. ;Specifications • L1-cache: 64 + 64 KB (data + instructions) • L2-cache: 512 KB, external chips on CPU module with 50%, 40% or 33% of CPU speed •
MMX,
3DNow! •
Slot A (EV6) •
Front-side bus:100 MHz (200MT/s) • Vcore: 1.6 V (K7), 1.6–1.8 V (K75) • First release: June 23, 1999 (K7), November 29, 1999 (K75) • Clock-rate: 500–700 MHz (K7), 550–1000 MHz (K75)
Athlon Thunderbird (2000–2001) The second-generation Athlon, the
Thunderbird or
T-Bird, debuted on June 4, 2000. making the L2 cache into basically a
victim cache. With the new cache design, need for high L2 performance and size was lessened, and the simpler L2 cache was less likely to cause clock scaling and yield issues. Thunderbird also moved to a
16-way associative layout. The Thunderbird was "cherished by many for its overclockability" and proved commercially successful, AMD's new
fab facility in
Dresden increased production for AMD overall and put out Thunderbirds at a fast rate, with the process technology improved by a switch to copper interconnects. After several versions were released in 2000 and 2001 of the Thunderbird, the last Athlon processor using the Thunderbird core was released in 2001 in the summer, at which point speeds were at 1.4 GHz. ''Palomino's
design used 180 nm fabrication process size. Among other changes, Palomino
consumed 20% less power than the Thunderbird, comparatively reducing heat output, and was roughly 10% faster than Thunderbird. Palomino'' also had enhanced K7's
TLB architecture and included a hardware data
prefetch mechanism to take better advantage of memory bandwidth.
Palomino was the first K7 core to include the full
SSE instruction set from the Intel Pentium III, as well as AMD's
3DNow! Professional.
Palomino was also the first socketed Athlon officially supporting dual processing, with chips certified for that purpose branded as the
Athlon MP (multi processing), which had different specifications. According to
HardwareZone, it was possible to modify the Athlon XP to function as an MP. ;Specifications • L1-cache: 64 + 64 KB (data + instructions) • L2-cache: 256 KB, full speed •
MMX,
3DNow!,
SSE •
Socket A (EV6) •
Front-side bus: 133 MHz (266 MT/s) • Vcore: 1.50 to 1.75 V • Power consumption: 68 W • First release: October 9, 2001 • Clock-rate: • Athlon 4: 850–1400 MHz • Athlon XP: 1333–1733 MHz (1500+ to 2100+) • Athlon MP: 1000–1733 MHz
Thoroughbred The fourth-generation of Athlon was introduced with the
Thoroughbred core, or
T-Bred, on April 17, 2002. The
Thoroughbred core marked AMD's first production 130 nm silicon, with smaller die size than its predecessor. ;Specifications • L1-cache: 64 + 64 KB (data + instructions) • L2-cache: 256 KB, full speed •
MMX,
3DNow!,
SSE •
Socket A (EV6) •
Front-side bus: 133/166 MHz (266/333 MT/s) • Vcore: 1.50–1.65 V • First release: June 10, 2002 (A), August 21, 2002 (B) • Clock-rate: • Thoroughbred "A": 1400–1800 MHz (1600+ to 2200+) • Thoroughbred "B": 1400–2250 MHz (1600+ to 2800+) • 133 MHz FSB: 1400–2133 MHz (1600+ to 2600+) • 166 MHz FSB: 2083–2250 MHz (2600+ to 2800+)
Barton / Thorton Fifth-generation Athlon
Barton-core processors were released in early 2003. While not operating at higher clock rates than
Thoroughbred-core processors, they featured an increased L2 cache, and later models had an increased 200 MHz (400 MT/s) front side bus. The
Thorton core, a blend of
Thoroughbred and
Barton, was a later variant of the
Barton with half of the L2 cache disabled. The
Barton was used to officially introduce a higher 400 MT/s bus clock for the Socket A platform, which was used to gain some
Barton models more efficiency. and
Barton only saw a small performance increase over the
Thoroughbred-B it derived from, Notably, the 2500+ Barton with 11× multiplier was effectively identical to the 3200+ part other than the FSB speed it was binned for, meaning that seamless overclocking was possible more often than not. Early Thortons could be restored to the full Barton specification with the enabling of the other half of the L2 cache from a slight CPU surface modification, but the result was not always reliable. ;Specifications:
Barton (130 nm) • L1-cache: 64 + 64 KB (data + instructions) • L2-cache: 512 KB, full speed •
MMX,
3DNow!,
SSE •
Socket A (EV6) •
Front-side bus: 166/200 MHz (333/400 MT/s) • Vcore: 1.65 V • First release: February 10, 2003 • Clock rate: 1833–2333 MHz (2500+ to 3200+) • 133 MHz FSB: 1867–2133 MHz (2500+ to 2800+); uncommon • 166 MHz FSB: 1833–2333 MHz (2500+ to 3200+) • 200 MHz FSB: 2100, 2200 MHz (3000+, 3200+)
Thorton (130 nm) • L1-cache: 64 + 64 KB (Data + Instructions) • L2-cache: 256 KB, full speed •
MMX,
3DNow!,
SSE •
Socket A (EV6) •
Front-side bus: 133/166/200 MHz (266/333/400 MT/s) • Vcore: 1.50–1.65 V • First release: September 2003 • Clock rate: 1667–2200 MHz (2000+ to 3100+) • 133 MHz FSB: 1600–2133 MHz (2000+ to 2600+) • 166 MHz FSB: 2083 MHz (2600+) • 200 MHz FSB: 2200 MHz (3100+)
Mobile Athlon XP The
Palomino core debuted in the mobile market before the PC market in May 2001, where it was branded as
Mobile Athlon 4 with the codename "Corvette". It distinctively used a
ceramic interposer much like the
Thunderbird instead of the
organic pin grid array package used on all later
Palomino processors. The Mobile Athlon 4 processors included the
PowerNow! function, which controlled a laptop's "level of processor performance by dynamically adjusting its operating frequency and voltage according to the task at hand", thus extending "battery life by reducing processor power when it isn't needed by applications". Duron chips also included PowerNow! In 2002 the
Athlon XP-M (Mobile Athlon XP) replaced the Mobile Athlon 4 using the newer
Thoroughbred core, with
Barton cores for full-size notebooks. The Athlon XP-M was also offered in a compact microPGA
socket 563 version. Mobile XPs were not
multiplier-locked, making them popular with desktop
overclockers.
Athlon 64 (2003–2009) The immediate successor to the Athlon XP, the
Athlon 64 is an AMD64-architecture microprocessor produced by AMD, released on September 23, 2003. A number of variations, all named after cities, were released with 90 nm architecture in 2004 and 2005. Versions
released in 2007 and 2009 utilized 65 nm architecture.
Athlon 64 X2 (2005–2009) The
Athlon 64 X2 was released in 2005 as the first native dual-core desktop CPU designed by AMD using an Athlon 64. The
Athlon X2 was a subsequent family of microprocessors based on the Athlon 64 X2. The original
Brisbane Athlon X2 models used 65 nm architecture and were released in 2007.
Athlon II (2009–2012) Athlon II is a family of central processing units. Initially a dual-core version of the Athlon II, the
K-10-based
Regor was released in June 2009 with 45-nanometer architecture. This was followed by a single-core version
Sargas, followed by the quad-core
Propus, the triple-core
Rana in November 2009, and the
Llano 32 nm version released in 2011.
Piledriver and Steamroller-based Athlon X4 (2013–2016) Various Steamroller-based Athlon X4 and X2 FM2+ socketed processors were released in 2014 and the years after. The preceding Piledriver-based Athlon X4 and X2 processors were released before 2014, and are socket compatible with both FM2+ and FM2 mainboards.
Excavator-based Athlon X4 (2017) The
Bristol Ridge Athlon X4 lineup was released in 2017. It is based on the
Excavator microarchitecture and uses 2 Excavator modules totalling 4 cores. It has a dual-channel
DDR4-2400 memory controller with clock speeds up to 4.0 GHz. It runs on the new
Socket AM4 platform that was later used for Zen 1 to Zen 3 CPUs.
Zen-based Athlon (2018–present) The
Zen-based Athlon with
Radeon graphics processors was launched in September 2018 with the Athlon 200GE. Based on AMD's
Raven Ridge core previously used in variants of the
Ryzen 3 and
Ryzen 5, and the chip was multiplier-locked. Despite its limitations, the Athlon 200GE performed competitively against the 5000-series Intel Pentium-G, displaying similar CPU performance but an advantage in GPU performance. On November 19, 2019, AMD released the Athlon 3000G, with a higher 3.5 GHz core clock and 1100 MHz graphics clock compared to the Athlon 200GE, Zen 2-based Athlon with Radeon Graphics processors, codenamed "Mendocino", were released on September 20, 2022, for the entry-level laptop market, alongside the more powerful quad-core
Ryzen 7020 mobile series under the same codename. Featuring two processing cores, with two threads on Athlon Silver and four threads on Athlon Gold models, Athlon 7020 series mobile processors are equipped with two compute units (CUs) of RDNA 2 graphics. These 7020U series models were followed by the release of Ryzen/Athlon 7020C series for Chromebooks on May 23, 2023. Unlike prior Athlon generations, AMD has not released desktop variants of Mendocino. ;Specifications
Raven Ridge (14 nm),
Picasso (12 nm)
(see the list article for more details) • L1 cache: 192 KiB (2×64 KiB + 2×32 KiB) • L2 cache: 1 MiB (2×512 KiB) • L3 cache: 4 MiB • Memory: dual-channel DDR4-2666, 64 GiB max. • Socket AM4 • TDP: 35 W • First release: September 6, 2018 • CPU clock rate: 3.2 to 3.5 GHz • GPU clock rate: 1000 to 1100 MHz
Mendocino (6 nm)
(see the list article for more details) • L1 cache: 128 KiB (2×32 KiB + 2×32 KiB) • L2 cache: 1 MiB (2×512 KiB) • L3 cache: 4 MiB • Memory: dual-channel LPDDR5-5500, 16 GiB max. • TDP: 15 W • First release: September 20, 2022 • CPU clock rate: 2.4 GHz • GPU clock rate: 1900 MHz ==Supercomputers==