The RP2040 chip is a
QFN-56EP
surface-mount device (SMD) package manufactured by
TSMC using its 40 nm process. • Key features: • Dual
ARM Cortex-M0+ cores (
ARMv6-M instruction set), Originally run at 133 MHz, • Each core has an integer divider peripheral and two interpolators • 264 KB
SRAM in six independent banks (four 64 KB, two 4 KB) • No internal
flash or
EEPROM memory (after reset, the boot-loader loads firmware from either external flash memory or
USB into internal SRAM) •
QSPI bus controller supports up to 16 MB of external flash memory • DMA controller, 12 channel, 2 IRQ •
AHB crossbar, fully-connected • On-chip programmable
low-dropout regulator (LDO) to generate core voltage • Two on-chip
PLLs to generate USB and core clocks • 30
GPIO pins, of which four can optionally be used as analog inputs • Peripherals: • One
USB 1.1 (LS & FS) controller and
PHY, host and device support, 1.5 Mbit/s (Low Speed) and 12 Mbit/s (Full Speed) • Two
UART controllers • Two
SPI controllers • One
QSPI (quad SPI) controller (SSI), supports 1 / 2 / 4-bit SPI transfers, 1 chip select • Two
I²C controllers • Eight PIO (
programmable input–output) state machines • 16
PWM channels • 4-channel 12-bit 500-ksps
SAR ADC, extra channel is connected to internal temperature sensor For comparison with the RP2350, see . ==Boards==