Developers core memory The basic concept of using the square
hysteresis loop of certain magnetic materials as a storage or switching device was known from the earliest days of computer development. Much of this knowledge had developed due to an understanding of
transformers, which allowed amplification and switch-like performance when built using certain materials. The stable switching behavior was well known in the
electrical engineering field, and its application in computer systems was immediate. For example,
J. Presper Eckert and
Jeffrey Chuan Chu had done some development work on the concept in 1945 at the
Moore School during the
ENIAC efforts. Robotics pioneer
George Devol filed a patent for the first static (non-moving) magnetic memory on 3 April 1946. Devol's magnetic memory was further refined via 5 additional patents and ultimately used in the first
industrial robot. Frederick Viehe applied for various patents on the use of
transformers for building digital logic circuits in place of
relay logic beginning in 1947. A fully developed core system was patented in 1947, and later purchased by
IBM in 1956. This development was little-known, however, and the mainstream development of core memory is normally associated with three independent teams. Substantial work in the field was carried out by the
Shanghai-born
American physicists
An Wang and
Way-Dong Woo, who created the
pulse transfer controlling device in 1949. The patent described a type of memory that would today be known as a
delay-line or
shift-register system. Each bit was stored using a pair of transformers, one that held the value and a second used for control. A
signal generator produced a series of pulses that were sent into the control transformers at half the energy needed to flip the polarity. The pulses were timed so the field in the transformers had not faded away before the next pulse arrived. If the storage transformer's field matched the field created by the pulse, then the total energy would cause a pulse to be injected into the next transformer pair. Those that did not contain a value simply faded out. Stored values were thus moved bit by bit down the chain with every pulse. Values were read out at the end, and fed back into the start of the chain to keep the values continually cycling through the system. Such systems have the disadvantage of not being random-access, to read any particular value one has to wait for it to cycle through the chain. Wang and Woo were working at
Harvard University's Computation Laboratory at the time, and the university was not interested in promoting inventions created in their labs. Wang was able to patent the system on his own. The MIT
Project Whirlwind computer required a fast memory system for
real-time aircraft tracking. At first, an array of
Williams tubes—a storage system based on
cathode-ray tubes—was used, but proved temperamental and unreliable. Several researchers in the late 1940s conceived the idea of using magnetic cores for computer memory, but MIT computer engineer
Jay Forrester received the principal patent for his invention of the coincident-current core memory that enabled the 3D storage of information. William Papian of Project Whirlwind cited one of these efforts, Harvard's "Static Magnetic Delay Line", in an internal memo. The first core memory of was installed on Whirlwind in the summer of 1953. Papian stated: "Magnetic-Core Storage has two big advantages: (1) greater reliability with a consequent reduction in maintenance time devoted to storage; (2) shorter access time (core access time is 9 microseconds: tube access time is approximately 25 microseconds), thus increasing the speed of computer operation." In April 2011, Forrester recalled, "the Wang use of cores did not have any influence on my development of random-access memory. The Wang memory was expensive and complicated. As I recall, which may not be entirely correct, it used two cores per binary bit and was essentially a delay line that moved a bit forward. To the extent that I may have focused on it, the approach was not suitable for our purposes." He describes the invention and associated events, in 1975. Forrester has since observed, "It took us about seven years to convince the industry that random-access magnetic-core memory was the solution to a missing link in computer technology. Then we spent the following seven years in the patent courts convincing them that they had not all thought of it first." A third developer involved in the early development of core memory was
Jan A. Rajchman at
RCA. A prolific inventor, Rajchman designed a unique core system using ferrite bands wrapped around thin metal tubes, building his first examples using a converted
aspirin press in 1949. Two key inventions led to the development of magnetic core memory in 1951. The first, developed by An Wang, was the write-after-read cycle, which solved the problem of how to use a storage medium in which the act of reading erased the data read, enabling the construction of a serial, one-dimensional
shift register (of 50 bits), using two cores to store a bit. A Wang core shift register is in the Revolution exhibit at the
Computer History Museum. The second, Forrester's, was the coincident-current system, which enabled a small number of wires to control a large number of cores, enabling 3D memory arrays of several million bits. The first use of magnetic core was in the Whirlwind computer, and Project Whirlwind's "most famous contribution was the random-access, magnetic core storage feature." Commercialization followed quickly. Magnetic core was used in peripherals of the
ENIAC in 1953, the
IBM 702 delivered in July 1955, and later in the 702 itself. The
IBM 704 (1954) and the
Ferranti Mercury (1957) used magnetic-core memory. It was during the early 1950s that
Seeburg Corporation developed one of the first commercial applications of coincident-current core memory storage in the "Tormat" memory of its new range of
jukeboxes, starting with the V200 developed in 1953 and released in 1955. Numerous uses in computing, telephony and industrial
process control followed.
Patent disputes Wang's patent was not granted until 1955, and by that time, magnetic-core memory was already in use. This started a long series of lawsuits, which eventually ended when
IBM bought the patent outright from Wang for . Wang used the funds to greatly expand
Wang Laboratories, which he had co-founded with Dr. Ge-Yao Chu, a schoolmate from China. MIT wanted to charge IBM $0.02 per bit royalty on core memory. In 1964, after years of legal wrangling, IBM paid MIT $13 million for rights to Forrester's patent—the largest patent settlement to that date.
Production economics In 1953, tested but not-yet-strung cores cost each. As manufacturing volume increased, by 1970 IBM was producing 20 billion cores per year, and the price per core fell to . Core sizes shrank over the same period from around diameter in the 1950s to in 1966. The power required to flip the magnetization of one core is proportional to the volume, so this represents a drop in power consumption by a factor of 125. The cost of complete core memory systems was dominated by the cost of stringing the wires through the cores. Forrester's coincident-current system required one of the wires to be run at 45 degrees to the cores, which proved difficult to wire by machine, so that core arrays had to be assembled under microscopes by workers with fine motor control. In 1956, a group at IBM filed for a patent on a machine to automatically thread the first few wires through each core. This machine held the full plane of cores in a "nest" and then pushed an array of hollow needles through the cores to guide the wires. Use of this machine reduced the time taken to thread the straight X and Y select lines from 25 hours to 12 minutes on a 128 by 128 core array. Smaller cores made the use of hollow needles impractical, but there were numerous advances in semi-automatic core threading. Support nests with guide channels were developed. Cores were permanently bonded to a backing sheet "patch" that supported them during manufacture and later use. Threading needles were
butt welded to the wires; the needle and wire diameters were the same, and efforts were made to eliminate the use of needles. The most important change, from the point of view of automation, was the combination of the sense and inhibit wires, eliminating the need for a circuitous diagonal sense wire. With small changes in layout, this also allowed much tighter packing of the cores in each patch. By the early 1960s, the cost of core fell to the point that it became nearly universal as
main memory, replacing both inexpensive low-performance
drum memory and costly high-performance systems using
vacuum tubes, and later discrete
transistors as memory. The cost of core memory declined sharply over the lifetime of the technology: costs began at roughly per bit and dropped to roughly per bit. Core memory was made
obsolete by
semiconductor integrated circuit memories in the 1970s, though remained in use for mission-critical and high-reliability applications in the
IBM System/4 Pi AP-101 (used in the
Space Shuttle until an upgrade in early 1990s, and the
B-52 and
B-1B bombers). An example of the scale, economics, and technology of core memory in the 1960s was the 256K 36-bit word (1.2
MiB) core memory unit installed on the
PDP-6 at the
MIT Artificial Intelligence Laboratory by 1967. This was considered "unimaginably huge" at the time, and nicknamed the "Moby Memory". It cost $380,000 ($0.04/bit) and its width, height and depth was with its supporting circuitry (189 kilobits/cubic foot = 6.7 kilobits/litre). Its cycle time was 2.75 μs. In 1980, the price of a 16 kW (
kiloword, equivalent to 32 kB) core memory board that fitted into a DEC Q-bus computer was around . At that time, core array and supporting electronics could fit on a single printed circuit board about in size, the core array was mounted a few mm above the PCB and was protected with a metal or plastic plate. ==Description==